7938d61591
We need to flush TLBs before releasing backing store otherwise userspace is able to encounter stale entries if a) it is not declaring access to certain buffers and b) it races with the backing store release from a such undeclared execution already executing on the GPU in parallel. The approach taken is to mark any buffer objects which were ever bound to the GPU and to trigger a serialized TLB flush when their backing store is released. Alternatively the flushing could be done on VMA unbind, at which point we would be able to ascertain whether there is potential a parallel GPU execution (which could race), but essentially it boils down to paying the cost of TLB flushes potentially needlessly at VMA unbind time (when the backing store is not known to be going away so not needed for safety), versus potentially needlessly at backing store relase time (since we at that point cannot tell whether there is anything executing on the GPU which uses that object). Thereforce simplicity of implementation has been chosen for now with scope to benchmark and refine later as required. Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Reported-by: Sushma Venkatesh Reddy <sushma.venkatesh.reddy@intel.com> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Acked-by: Dave Airlie <airlied@redhat.com> Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Cc: Jon Bloomfield <jon.bloomfield@intel.com> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Cc: Jani Nikula <jani.nikula@intel.com> Cc: stable@vger.kernel.org Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
97 lines
2.8 KiB
C
97 lines
2.8 KiB
C
/* SPDX-License-Identifier: MIT */
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/*
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* Copyright © 2019 Intel Corporation
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*/
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#ifndef __INTEL_GT__
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#define __INTEL_GT__
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#include "intel_engine_types.h"
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#include "intel_gt_types.h"
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#include "intel_reset.h"
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struct drm_i915_private;
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struct drm_printer;
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#define GT_TRACE(gt, fmt, ...) do { \
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const struct intel_gt *gt__ __maybe_unused = (gt); \
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GEM_TRACE("%s " fmt, dev_name(gt__->i915->drm.dev), \
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##__VA_ARGS__); \
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} while (0)
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static inline struct intel_gt *uc_to_gt(struct intel_uc *uc)
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{
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return container_of(uc, struct intel_gt, uc);
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}
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static inline struct intel_gt *guc_to_gt(struct intel_guc *guc)
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{
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return container_of(guc, struct intel_gt, uc.guc);
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}
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static inline struct intel_gt *huc_to_gt(struct intel_huc *huc)
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{
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return container_of(huc, struct intel_gt, uc.huc);
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}
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void intel_gt_init_early(struct intel_gt *gt, struct drm_i915_private *i915);
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void __intel_gt_init_early(struct intel_gt *gt, struct drm_i915_private *i915);
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void intel_gt_init_hw_early(struct intel_gt *gt, struct i915_ggtt *ggtt);
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int intel_gt_probe_lmem(struct intel_gt *gt);
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int intel_gt_init_mmio(struct intel_gt *gt);
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int __must_check intel_gt_init_hw(struct intel_gt *gt);
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int intel_gt_init(struct intel_gt *gt);
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void intel_gt_driver_register(struct intel_gt *gt);
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void intel_gt_driver_unregister(struct intel_gt *gt);
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void intel_gt_driver_remove(struct intel_gt *gt);
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void intel_gt_driver_release(struct intel_gt *gt);
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void intel_gt_driver_late_release(struct intel_gt *gt);
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int intel_gt_wait_for_idle(struct intel_gt *gt, long timeout);
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void intel_gt_check_and_clear_faults(struct intel_gt *gt);
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void intel_gt_clear_error_registers(struct intel_gt *gt,
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intel_engine_mask_t engine_mask);
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void intel_gt_flush_ggtt_writes(struct intel_gt *gt);
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void intel_gt_chipset_flush(struct intel_gt *gt);
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static inline u32 intel_gt_scratch_offset(const struct intel_gt *gt,
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enum intel_gt_scratch_field field)
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{
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return i915_ggtt_offset(gt->scratch) + field;
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}
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static inline bool intel_gt_has_unrecoverable_error(const struct intel_gt *gt)
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{
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return test_bit(I915_WEDGED_ON_INIT, >->reset.flags) ||
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test_bit(I915_WEDGED_ON_FINI, >->reset.flags);
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}
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static inline bool intel_gt_is_wedged(const struct intel_gt *gt)
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{
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GEM_BUG_ON(intel_gt_has_unrecoverable_error(gt) &&
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!test_bit(I915_WEDGED, >->reset.flags));
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return unlikely(test_bit(I915_WEDGED, >->reset.flags));
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}
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static inline bool intel_gt_needs_read_steering(struct intel_gt *gt,
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enum intel_steering_type type)
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{
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return gt->steering_table[type];
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}
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u32 intel_gt_read_register_fw(struct intel_gt *gt, i915_reg_t reg);
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void intel_gt_info_print(const struct intel_gt_info *info,
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struct drm_printer *p);
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void intel_gt_watchdog_work(struct work_struct *work);
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void intel_gt_invalidate_tlbs(struct intel_gt *gt);
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#endif /* __INTEL_GT_H__ */
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