5ff0cb1ce2
Currently, for every single MST capable DRM connector we create a set of fake encoders, one for each possible head. Unfortunately this ends up being a huge waste of encoders. While this currently isn't causing us any problems, it's extremely close to doing so. The ThinkPad P71 is a good example of this. Originally when trying to figure out why nouveau was failing to load on this laptop, I discovered it was because nouveau was creating too many encoders. This ended up being because we were mistakenly creating MST encoders for the eDP port, however we are still extremely close to hitting the encoder limit on this machine as it exposes 1 eDP port and 5 DP ports, resulting in 31 encoders. So while this fix didn't end up being necessary to fix the P71, we still need to implement this so that we avoid hitting the encoder limit for valid display configurations in the event that some machine with more connectors then this becomes available. Plus, we don't want to let good code go to waste :) So, use less encoders by only creating one MSTO per head. Then, attach each new MSTC to each MSTO which corresponds to a head that it's parent DP port is capable of using. This brings the number of encoders we register on the ThinkPad P71 from 31, down to just 15. Yay! Signed-off-by: Lyude Paul <lyude@redhat.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
95 lines
2.7 KiB
C
95 lines
2.7 KiB
C
#ifndef __NV50_KMS_H__
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#define __NV50_KMS_H__
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#include <nvif/mem.h>
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#include "nouveau_display.h"
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struct nv50_msto;
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struct nv50_disp {
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struct nvif_disp *disp;
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struct nv50_core *core;
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#define NV50_DISP_SYNC(c, o) ((c) * 0x040 + (o))
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#define NV50_DISP_CORE_NTFY NV50_DISP_SYNC(0 , 0x00)
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#define NV50_DISP_WNDW_SEM0(c) NV50_DISP_SYNC(1 + (c), 0x00)
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#define NV50_DISP_WNDW_SEM1(c) NV50_DISP_SYNC(1 + (c), 0x10)
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#define NV50_DISP_WNDW_NTFY(c) NV50_DISP_SYNC(1 + (c), 0x20)
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#define NV50_DISP_BASE_SEM0(c) NV50_DISP_WNDW_SEM0(0 + (c))
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#define NV50_DISP_BASE_SEM1(c) NV50_DISP_WNDW_SEM1(0 + (c))
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#define NV50_DISP_BASE_NTFY(c) NV50_DISP_WNDW_NTFY(0 + (c))
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#define NV50_DISP_OVLY_SEM0(c) NV50_DISP_WNDW_SEM0(4 + (c))
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#define NV50_DISP_OVLY_SEM1(c) NV50_DISP_WNDW_SEM1(4 + (c))
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#define NV50_DISP_OVLY_NTFY(c) NV50_DISP_WNDW_NTFY(4 + (c))
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struct nouveau_bo *sync;
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struct mutex mutex;
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};
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static inline struct nv50_disp *
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nv50_disp(struct drm_device *dev)
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{
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return nouveau_display(dev)->priv;
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}
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struct nv50_disp_interlock {
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enum nv50_disp_interlock_type {
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NV50_DISP_INTERLOCK_CORE = 0,
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NV50_DISP_INTERLOCK_CURS,
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NV50_DISP_INTERLOCK_BASE,
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NV50_DISP_INTERLOCK_OVLY,
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NV50_DISP_INTERLOCK_WNDW,
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NV50_DISP_INTERLOCK_WIMM,
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NV50_DISP_INTERLOCK__SIZE
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} type;
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u32 data;
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u32 wimm;
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};
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void corec37d_ntfy_init(struct nouveau_bo *, u32);
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void head907d_olut_load(struct drm_color_lut *, int size, void __iomem *);
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struct nv50_chan {
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struct nvif_object user;
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struct nvif_device *device;
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};
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struct nv50_dmac {
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struct nv50_chan base;
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struct nvif_mem push;
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u32 *ptr;
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struct nvif_object sync;
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struct nvif_object vram;
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/* Protects against concurrent pushbuf access to this channel, lock is
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* grabbed by evo_wait (if the pushbuf reservation is successful) and
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* dropped again by evo_kick. */
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struct mutex lock;
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};
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int nv50_dmac_create(struct nvif_device *device, struct nvif_object *disp,
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const s32 *oclass, u8 head, void *data, u32 size,
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u64 syncbuf, struct nv50_dmac *dmac);
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void nv50_dmac_destroy(struct nv50_dmac *);
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u32 *evo_wait(struct nv50_dmac *, int nr);
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void evo_kick(u32 *, struct nv50_dmac *);
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#define evo_mthd(p, m, s) do { \
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const u32 _m = (m), _s = (s); \
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if (drm_debug_enabled(DRM_UT_KMS)) \
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pr_err("%04x %d %s\n", _m, _s, __func__); \
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*((p)++) = ((_s << 18) | _m); \
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} while(0)
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#define evo_data(p, d) do { \
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const u32 _d = (d); \
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if (drm_debug_enabled(DRM_UT_KMS)) \
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pr_err("\t%08x\n", _d); \
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*((p)++) = _d; \
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} while(0)
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#endif
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