7f40c260df
The TI K3 AM65x and J721E family of SoCs have a HwSpinlock IP that is similar to the existing HwSpinlock IP present in OMAP architecture based SoCs with minor differences. Update the existing OMAP HwSpinlock binding for this IP on TI K3 AM65x and J721E SoCs. The same compatible from AM65x SoCs is reused for J721E SoCs. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
42 lines
1.2 KiB
Plaintext
42 lines
1.2 KiB
Plaintext
TI HwSpinlock for OMAP and K3 based SoCs
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=========================================
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Required properties:
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- compatible: Should be one of the following,
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"ti,omap4-hwspinlock" for
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OMAP44xx, OMAP54xx, AM33xx, AM43xx, DRA7xx SoCs
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"ti,am654-hwspinlock" for
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K3 AM65x and J721E SoCs
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- reg: Contains the hwspinlock module register address space
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(base address and length)
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- ti,hwmods: Name of the hwmod associated with the hwspinlock device
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(for OMAP architecture based SoCs only)
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- #hwlock-cells: Should be 1. The OMAP hwspinlock users will use a
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0-indexed relative hwlock number as the argument
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specifier value for requesting a specific hwspinlock
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within a hwspinlock bank.
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Please look at the generic hwlock binding for usage information for consumers,
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"Documentation/devicetree/bindings/hwlock/hwlock.txt"
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Example:
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1. OMAP4 SoCs
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hwspinlock: spinlock@4a0f6000 {
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compatible = "ti,omap4-hwspinlock";
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reg = <0x4a0f6000 0x1000>;
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ti,hwmods = "spinlock";
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#hwlock-cells = <1>;
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};
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2. AM65x SoCs and J721E SoCs
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&cbass_main {
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cbass_main_navss: interconnect0 {
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hwspinlock: spinlock@30e00000 {
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compatible = "ti,am654-hwspinlock";
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reg = <0x00 0x30e00000 0x00 0x1000>;
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#hwlock-cells = <1>;
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};
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};
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};
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