854bdbae90
Commit1de243b076("media: dt-bindings: media: sun4i-csi: Add compatible for CSI1 on A10/A20") introduced support for the CSI1 controller on A10 and A20 that unlike CSI0 doesn't have an ISP and therefore only have two clocks, the bus and module clocks. The clocks and clock-names properties have thus been modified to allow either two or tree clocks. However, the current list has the ISP clock at the second position, which means the bindings expects a list of either bus and isp, or bus, isp and mod. The initial intent of the patch was obviously to have bus and mod in the former case. Let's fix the binding so that it validates properly. Fixes:1de243b076("media: dt-bindings: media: sun4i-csi: Add compatible for CSI1 on A10/A20") Signed-off-by: Maxime Ripard <maxime@cerno.tech> Signed-off-by: Rob Herring <robh@kernel.org>
135 lines
3.1 KiB
YAML
135 lines
3.1 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/media/allwinner,sun4i-a10-csi.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Allwinner A10 CMOS Sensor Interface (CSI) Device Tree Bindings
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maintainers:
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- Chen-Yu Tsai <wens@csie.org>
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- Maxime Ripard <mripard@kernel.org>
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description: |-
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The Allwinner A10 and later has a CMOS Sensor Interface to retrieve
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frames from a parallel or BT656 sensor.
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properties:
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compatible:
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oneOf:
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- const: allwinner,sun4i-a10-csi1
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- const: allwinner,sun7i-a20-csi0
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- items:
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- const: allwinner,sun7i-a20-csi1
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- const: allwinner,sun4i-a10-csi1
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- items:
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- const: allwinner,sun8i-r40-csi0
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- const: allwinner,sun7i-a20-csi0
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reg:
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maxItems: 1
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interrupts:
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maxItems: 1
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clocks:
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oneOf:
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- items:
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- description: The CSI interface clock
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- description: The CSI DRAM clock
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- items:
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- description: The CSI interface clock
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- description: The CSI ISP clock
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- description: The CSI DRAM clock
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clock-names:
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oneOf:
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- items:
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- const: bus
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- const: ram
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- items:
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- const: bus
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- const: isp
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- const: ram
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resets:
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maxItems: 1
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# FIXME: This should be made required eventually once every SoC will
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# have the MBUS declared.
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interconnects:
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maxItems: 1
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# FIXME: This should be made required eventually once every SoC will
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# have the MBUS declared.
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interconnect-names:
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const: dma-mem
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# See ./video-interfaces.txt for details
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port:
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type: object
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additionalProperties: false
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properties:
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endpoint:
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type: object
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properties:
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bus-width:
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enum: [8, 16]
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data-active: true
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hsync-active: true
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pclk-sample: true
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remote-endpoint: true
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vsync-active: true
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required:
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- bus-width
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- data-active
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- hsync-active
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- pclk-sample
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- remote-endpoint
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- vsync-active
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required:
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- endpoint
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required:
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- compatible
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- reg
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- interrupts
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- clocks
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/clock/sun7i-a20-ccu.h>
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#include <dt-bindings/reset/sun4i-a10-ccu.h>
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csi0: csi@1c09000 {
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compatible = "allwinner,sun7i-a20-csi0";
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reg = <0x01c09000 0x1000>;
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interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&ccu CLK_AHB_CSI0>, <&ccu CLK_CSI_SCLK>, <&ccu CLK_DRAM_CSI0>;
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clock-names = "bus", "isp", "ram";
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resets = <&ccu RST_CSI0>;
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port {
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csi_from_ov5640: endpoint {
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remote-endpoint = <&ov5640_to_csi>;
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bus-width = <8>;
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hsync-active = <1>; /* Active high */
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vsync-active = <0>; /* Active low */
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data-active = <1>; /* Active high */
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pclk-sample = <1>; /* Rising */
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};
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};
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};
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...
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