e16d3dc0a2
The StarFive VisionFive V1 SBC uses a Motorcomm YT8521 PHY supporting RGMII-ID, but requires manual adjustment of the RX internal delay to work properly. The default RX delay provided by the driver is 1.95 ns, which proves to be too high. Applying a 50% reduction seems to mitigate the issue. Also note this adjustment is not necessary on BeagleV Starlight SBC, which uses a Microchip PHY. Hence, there is no indication of a misbehaviour on the GMAC side, but most likely the issue stems from the Motorcomm PHY. While at it, drop the redundant gpio include, which is already provided by jh7100-common.dtsi. Co-developed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com> Signed-off-by: Emil Renner Berthing <emil.renner.berthing@canonical.com> Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com> Reviewed-by: Jacob Keller <jacob.e.keller@intel.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
41 lines
1.0 KiB
Plaintext
41 lines
1.0 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0 OR MIT
|
|
/*
|
|
* Copyright (C) 2021 StarFive Technology Co., Ltd.
|
|
* Copyright (C) 2021 Emil Renner Berthing <kernel@esmil.dk>
|
|
*/
|
|
|
|
/dts-v1/;
|
|
#include "jh7100-common.dtsi"
|
|
|
|
/ {
|
|
model = "StarFive VisionFive V1";
|
|
compatible = "starfive,visionfive-v1", "starfive,jh7100";
|
|
|
|
gpio-restart {
|
|
compatible = "gpio-restart";
|
|
gpios = <&gpio 63 GPIO_ACTIVE_HIGH>;
|
|
priority = <224>;
|
|
};
|
|
};
|
|
|
|
&gmac {
|
|
phy-handle = <&phy>;
|
|
};
|
|
|
|
/*
|
|
* The board uses a Motorcomm YT8521 PHY supporting RGMII-ID, but requires
|
|
* manual adjustment of the RX internal delay to work properly. The default
|
|
* RX delay provided by the driver (1.95ns) is too high, but applying a 50%
|
|
* reduction seems to mitigate the issue.
|
|
*
|
|
* It is worth noting the adjustment is not necessary on BeagleV Starlight SBC,
|
|
* which uses a Microchip PHY. Hence, most likely the Motorcomm PHY is the one
|
|
* responsible for the misbehaviour, not the GMAC.
|
|
*/
|
|
&mdio {
|
|
phy: ethernet-phy@0 {
|
|
reg = <0>;
|
|
rx-internal-delay-ps = <900>;
|
|
};
|
|
};
|