15b016b2d0
The .remove() callback for a platform driver returns an int which makes many driver authors wrongly assume it's possible to do error handling by returning an error code. However the value returned is ignored (apart from emitting a warning) and this typically results in resource leaks. To improve here there is a quest to make the remove callback return void. In the first step of this quest all drivers are converted to .remove_new(), which already returns void. Eventually after all drivers are converted, .remove_new() will be renamed to .remove(). In the error path emit an error message replacing the (less useful) message by the core. Apart from the improved error message there is no change in behaviour. Trivially convert this driver from always returning zero in the remove callback to the void returning variant. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Link: https://lore.kernel.org/r/84239a68fe06143d1d6fed6c9aaae6a4680ead71.1701619134.git.u.kleine-koenig@pengutronix.de Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
670 lines
16 KiB
C
670 lines
16 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Sun3 SCSI stuff by Erik Verbruggen (erik@bigmama.xtdnet.nl)
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*
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* Sun3 DMA routines added by Sam Creasey (sammy@sammy.net)
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*
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* VME support added by Sam Creasey
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*
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* TODO: modify this driver to support multiple Sun3 SCSI VME boards
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*
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* Adapted from mac_scsinew.c:
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*/
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/*
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* Generic Macintosh NCR5380 driver
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*
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* Copyright 1998, Michael Schmitz <mschmitz@lbl.gov>
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*
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* derived in part from:
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*/
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/*
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* Generic Generic NCR5380 driver
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*
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* Copyright 1995, Russell King
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*/
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#include <linux/types.h>
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#include <linux/delay.h>
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#include <linux/module.h>
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#include <linux/ioport.h>
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#include <linux/init.h>
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#include <linux/blkdev.h>
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#include <linux/platform_device.h>
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#include <asm/io.h>
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#include <asm/dvma.h>
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#include <scsi/scsi_host.h>
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/* minimum number of bytes to do dma on */
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#define DMA_MIN_SIZE 129
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/* Definitions for the core NCR5380 driver. */
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#define NCR5380_implementation_fields /* none */
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#define NCR5380_read(reg) in_8(hostdata->io + (reg))
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#define NCR5380_write(reg, value) out_8(hostdata->io + (reg), value)
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#define NCR5380_queue_command sun3scsi_queue_command
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#define NCR5380_host_reset sun3scsi_host_reset
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#define NCR5380_abort sun3scsi_abort
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#define NCR5380_info sun3scsi_info
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#define NCR5380_dma_xfer_len sun3scsi_dma_xfer_len
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#define NCR5380_dma_recv_setup sun3scsi_dma_count
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#define NCR5380_dma_send_setup sun3scsi_dma_count
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#define NCR5380_dma_residual sun3scsi_dma_residual
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#include "NCR5380.h"
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/* dma regs start at regbase + 8, directly after the NCR regs */
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struct sun3_dma_regs {
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unsigned short dma_addr_hi; /* vme only */
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unsigned short dma_addr_lo; /* vme only */
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unsigned short dma_count_hi; /* vme only */
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unsigned short dma_count_lo; /* vme only */
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unsigned short udc_data; /* udc dma data reg (obio only) */
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unsigned short udc_addr; /* uda dma addr reg (obio only) */
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unsigned short fifo_data; /* fifo data reg,
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* holds extra byte on odd dma reads
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*/
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unsigned short fifo_count;
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unsigned short csr; /* control/status reg */
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unsigned short bpack_hi; /* vme only */
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unsigned short bpack_lo; /* vme only */
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unsigned short ivect; /* vme only */
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unsigned short fifo_count_hi; /* vme only */
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};
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/* ucd chip specific regs - live in dvma space */
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struct sun3_udc_regs {
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unsigned short rsel; /* select regs to load */
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unsigned short addr_hi; /* high word of addr */
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unsigned short addr_lo; /* low word */
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unsigned short count; /* words to be xfer'd */
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unsigned short mode_hi; /* high word of channel mode */
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unsigned short mode_lo; /* low word of channel mode */
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};
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/* addresses of the udc registers */
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#define UDC_MODE 0x38
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#define UDC_CSR 0x2e /* command/status */
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#define UDC_CHN_HI 0x26 /* chain high word */
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#define UDC_CHN_LO 0x22 /* chain lo word */
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#define UDC_CURA_HI 0x1a /* cur reg A high */
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#define UDC_CURA_LO 0x0a /* cur reg A low */
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#define UDC_CURB_HI 0x12 /* cur reg B high */
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#define UDC_CURB_LO 0x02 /* cur reg B low */
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#define UDC_MODE_HI 0x56 /* mode reg high */
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#define UDC_MODE_LO 0x52 /* mode reg low */
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#define UDC_COUNT 0x32 /* words to xfer */
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/* some udc commands */
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#define UDC_RESET 0
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#define UDC_CHN_START 0xa0 /* start chain */
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#define UDC_INT_ENABLE 0x32 /* channel 1 int on */
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/* udc mode words */
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#define UDC_MODE_HIWORD 0x40
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#define UDC_MODE_LSEND 0xc2
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#define UDC_MODE_LRECV 0xd2
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/* udc reg selections */
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#define UDC_RSEL_SEND 0x282
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#define UDC_RSEL_RECV 0x182
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/* bits in csr reg */
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#define CSR_DMA_ACTIVE 0x8000
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#define CSR_DMA_CONFLICT 0x4000
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#define CSR_DMA_BUSERR 0x2000
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#define CSR_FIFO_EMPTY 0x400 /* fifo flushed? */
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#define CSR_SDB_INT 0x200 /* sbc interrupt pending */
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#define CSR_DMA_INT 0x100 /* dma interrupt pending */
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#define CSR_LEFT 0xc0
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#define CSR_LEFT_3 0xc0
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#define CSR_LEFT_2 0x80
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#define CSR_LEFT_1 0x40
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#define CSR_PACK_ENABLE 0x20
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#define CSR_DMA_ENABLE 0x10
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#define CSR_SEND 0x8 /* 1 = send 0 = recv */
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#define CSR_FIFO 0x2 /* reset fifo */
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#define CSR_INTR 0x4 /* interrupt enable */
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#define CSR_SCSI 0x1
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#define VME_DATA24 0x3d00
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extern int sun3_map_test(unsigned long, char *);
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static int setup_can_queue = -1;
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module_param(setup_can_queue, int, 0);
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static int setup_cmd_per_lun = -1;
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module_param(setup_cmd_per_lun, int, 0);
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static int setup_sg_tablesize = -1;
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module_param(setup_sg_tablesize, int, 0);
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static int setup_hostid = -1;
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module_param(setup_hostid, int, 0);
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/* ms to wait after hitting dma regs */
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#define SUN3_DMA_DELAY 10
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/* dvma buffer to allocate -- 32k should hopefully be more than sufficient */
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#define SUN3_DVMA_BUFSIZE 0xe000
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static struct scsi_cmnd *sun3_dma_setup_done;
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static volatile struct sun3_dma_regs *dregs;
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static struct sun3_udc_regs *udc_regs;
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static unsigned char *sun3_dma_orig_addr;
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static unsigned long sun3_dma_orig_count;
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static int sun3_dma_active;
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static unsigned long last_residual;
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#ifndef SUN3_SCSI_VME
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/* dma controller register access functions */
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static inline unsigned short sun3_udc_read(unsigned char reg)
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{
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unsigned short ret;
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dregs->udc_addr = UDC_CSR;
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udelay(SUN3_DMA_DELAY);
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ret = dregs->udc_data;
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udelay(SUN3_DMA_DELAY);
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return ret;
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}
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static inline void sun3_udc_write(unsigned short val, unsigned char reg)
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{
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dregs->udc_addr = reg;
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udelay(SUN3_DMA_DELAY);
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dregs->udc_data = val;
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udelay(SUN3_DMA_DELAY);
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}
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#endif
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// safe bits for the CSR
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#define CSR_GOOD 0x060f
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static irqreturn_t scsi_sun3_intr(int irq, void *dev)
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{
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struct Scsi_Host *instance = dev;
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unsigned short csr = dregs->csr;
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int handled = 0;
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#ifdef SUN3_SCSI_VME
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dregs->csr &= ~CSR_DMA_ENABLE;
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#endif
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if(csr & ~CSR_GOOD) {
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if (csr & CSR_DMA_BUSERR)
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shost_printk(KERN_ERR, instance, "bus error in DMA\n");
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if (csr & CSR_DMA_CONFLICT)
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shost_printk(KERN_ERR, instance, "DMA conflict\n");
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handled = 1;
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}
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if(csr & (CSR_SDB_INT | CSR_DMA_INT)) {
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NCR5380_intr(irq, dev);
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handled = 1;
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}
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return IRQ_RETVAL(handled);
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}
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/* sun3scsi_dma_setup() -- initialize the dma controller for a read/write */
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static int sun3scsi_dma_setup(struct NCR5380_hostdata *hostdata,
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unsigned char *data, int count, int write_flag)
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{
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void *addr;
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if(sun3_dma_orig_addr != NULL)
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dvma_unmap(sun3_dma_orig_addr);
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#ifdef SUN3_SCSI_VME
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addr = (void *)dvma_map_vme((unsigned long) data, count);
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#else
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addr = (void *)dvma_map((unsigned long) data, count);
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#endif
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sun3_dma_orig_addr = addr;
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sun3_dma_orig_count = count;
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#ifndef SUN3_SCSI_VME
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dregs->fifo_count = 0;
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sun3_udc_write(UDC_RESET, UDC_CSR);
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/* reset fifo */
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dregs->csr &= ~CSR_FIFO;
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dregs->csr |= CSR_FIFO;
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#endif
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/* set direction */
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if(write_flag)
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dregs->csr |= CSR_SEND;
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else
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dregs->csr &= ~CSR_SEND;
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#ifdef SUN3_SCSI_VME
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dregs->csr |= CSR_PACK_ENABLE;
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dregs->dma_addr_hi = ((unsigned long)addr >> 16);
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dregs->dma_addr_lo = ((unsigned long)addr & 0xffff);
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dregs->dma_count_hi = 0;
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dregs->dma_count_lo = 0;
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dregs->fifo_count_hi = 0;
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dregs->fifo_count = 0;
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#else
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/* byte count for fifo */
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dregs->fifo_count = count;
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sun3_udc_write(UDC_RESET, UDC_CSR);
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/* reset fifo */
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dregs->csr &= ~CSR_FIFO;
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dregs->csr |= CSR_FIFO;
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if(dregs->fifo_count != count) {
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shost_printk(KERN_ERR, hostdata->host,
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"FIFO mismatch %04x not %04x\n",
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dregs->fifo_count, (unsigned int) count);
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NCR5380_dprint(NDEBUG_DMA, hostdata->host);
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}
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/* setup udc */
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udc_regs->addr_hi = (((unsigned long)(addr) & 0xff0000) >> 8);
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udc_regs->addr_lo = ((unsigned long)(addr) & 0xffff);
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udc_regs->count = count/2; /* count in words */
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udc_regs->mode_hi = UDC_MODE_HIWORD;
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if(write_flag) {
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if(count & 1)
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udc_regs->count++;
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udc_regs->mode_lo = UDC_MODE_LSEND;
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udc_regs->rsel = UDC_RSEL_SEND;
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} else {
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udc_regs->mode_lo = UDC_MODE_LRECV;
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udc_regs->rsel = UDC_RSEL_RECV;
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}
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/* announce location of regs block */
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sun3_udc_write(((dvma_vtob(udc_regs) & 0xff0000) >> 8),
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UDC_CHN_HI);
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sun3_udc_write((dvma_vtob(udc_regs) & 0xffff), UDC_CHN_LO);
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/* set dma master on */
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sun3_udc_write(0xd, UDC_MODE);
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/* interrupt enable */
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sun3_udc_write(UDC_INT_ENABLE, UDC_CSR);
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#endif
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return count;
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}
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static int sun3scsi_dma_count(struct NCR5380_hostdata *hostdata,
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unsigned char *data, int count)
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{
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return count;
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}
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static inline int sun3scsi_dma_recv_setup(struct NCR5380_hostdata *hostdata,
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unsigned char *data, int count)
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{
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return sun3scsi_dma_setup(hostdata, data, count, 0);
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}
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static inline int sun3scsi_dma_send_setup(struct NCR5380_hostdata *hostdata,
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unsigned char *data, int count)
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{
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return sun3scsi_dma_setup(hostdata, data, count, 1);
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}
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static int sun3scsi_dma_residual(struct NCR5380_hostdata *hostdata)
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{
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return last_residual;
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}
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static int sun3scsi_dma_xfer_len(struct NCR5380_hostdata *hostdata,
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struct scsi_cmnd *cmd)
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{
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int wanted_len = NCR5380_to_ncmd(cmd)->this_residual;
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if (wanted_len < DMA_MIN_SIZE || blk_rq_is_passthrough(scsi_cmd_to_rq(cmd)))
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return 0;
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return wanted_len;
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}
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static inline int sun3scsi_dma_start(unsigned long count, unsigned char *data)
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{
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#ifdef SUN3_SCSI_VME
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unsigned short csr;
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csr = dregs->csr;
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dregs->dma_count_hi = (sun3_dma_orig_count >> 16);
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dregs->dma_count_lo = (sun3_dma_orig_count & 0xffff);
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dregs->fifo_count_hi = (sun3_dma_orig_count >> 16);
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dregs->fifo_count = (sun3_dma_orig_count & 0xffff);
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/* if(!(csr & CSR_DMA_ENABLE))
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* dregs->csr |= CSR_DMA_ENABLE;
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*/
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#else
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sun3_udc_write(UDC_CHN_START, UDC_CSR);
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#endif
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return 0;
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}
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/* clean up after our dma is done */
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static int sun3scsi_dma_finish(enum dma_data_direction data_dir)
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{
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const bool write_flag = data_dir == DMA_TO_DEVICE;
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unsigned short __maybe_unused count;
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unsigned short fifo;
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int ret = 0;
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sun3_dma_active = 0;
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#ifdef SUN3_SCSI_VME
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dregs->csr &= ~CSR_DMA_ENABLE;
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fifo = dregs->fifo_count;
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if (write_flag) {
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if ((fifo > 0) && (fifo < sun3_dma_orig_count))
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fifo++;
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}
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last_residual = fifo;
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/* empty bytes from the fifo which didn't make it */
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if ((!write_flag) && (dregs->csr & CSR_LEFT)) {
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unsigned char *vaddr;
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vaddr = (unsigned char *)dvma_vmetov(sun3_dma_orig_addr);
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vaddr += (sun3_dma_orig_count - fifo);
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vaddr--;
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switch (dregs->csr & CSR_LEFT) {
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case CSR_LEFT_3:
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*vaddr = (dregs->bpack_lo & 0xff00) >> 8;
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vaddr--;
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fallthrough;
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case CSR_LEFT_2:
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*vaddr = (dregs->bpack_hi & 0x00ff);
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vaddr--;
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fallthrough;
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case CSR_LEFT_1:
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*vaddr = (dregs->bpack_hi & 0xff00) >> 8;
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break;
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}
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}
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#else
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// check to empty the fifo on a read
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if(!write_flag) {
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int tmo = 20000; /* .2 sec */
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while(1) {
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if(dregs->csr & CSR_FIFO_EMPTY)
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break;
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if(--tmo <= 0) {
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printk("sun3scsi: fifo failed to empty!\n");
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return 1;
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}
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udelay(10);
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}
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}
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dregs->udc_addr = 0x32;
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udelay(SUN3_DMA_DELAY);
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count = 2 * dregs->udc_data;
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udelay(SUN3_DMA_DELAY);
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fifo = dregs->fifo_count;
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last_residual = fifo;
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/* empty bytes from the fifo which didn't make it */
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if((!write_flag) && (count - fifo) == 2) {
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unsigned short data;
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unsigned char *vaddr;
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data = dregs->fifo_data;
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vaddr = (unsigned char *)dvma_btov(sun3_dma_orig_addr);
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vaddr += (sun3_dma_orig_count - fifo);
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vaddr[-2] = (data & 0xff00) >> 8;
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vaddr[-1] = (data & 0xff);
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}
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#endif
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dvma_unmap(sun3_dma_orig_addr);
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sun3_dma_orig_addr = NULL;
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#ifdef SUN3_SCSI_VME
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dregs->dma_addr_hi = 0;
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dregs->dma_addr_lo = 0;
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dregs->dma_count_hi = 0;
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dregs->dma_count_lo = 0;
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dregs->fifo_count = 0;
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dregs->fifo_count_hi = 0;
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dregs->csr &= ~CSR_SEND;
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/* dregs->csr |= CSR_DMA_ENABLE; */
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#else
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sun3_udc_write(UDC_RESET, UDC_CSR);
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dregs->fifo_count = 0;
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dregs->csr &= ~CSR_SEND;
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/* reset fifo */
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dregs->csr &= ~CSR_FIFO;
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dregs->csr |= CSR_FIFO;
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#endif
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sun3_dma_setup_done = NULL;
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return ret;
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}
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#include "NCR5380.c"
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#ifdef SUN3_SCSI_VME
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#define SUN3_SCSI_NAME "Sun3 NCR5380 VME SCSI"
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#define DRV_MODULE_NAME "sun3_scsi_vme"
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#else
|
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#define SUN3_SCSI_NAME "Sun3 NCR5380 SCSI"
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#define DRV_MODULE_NAME "sun3_scsi"
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|
#endif
|
|
|
|
#define PFX DRV_MODULE_NAME ": "
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|
|
|
static struct scsi_host_template sun3_scsi_template = {
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.module = THIS_MODULE,
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.proc_name = DRV_MODULE_NAME,
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.name = SUN3_SCSI_NAME,
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.info = sun3scsi_info,
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.queuecommand = sun3scsi_queue_command,
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.eh_abort_handler = sun3scsi_abort,
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|
.eh_host_reset_handler = sun3scsi_host_reset,
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|
.can_queue = 16,
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|
.this_id = 7,
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|
.sg_tablesize = 1,
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.cmd_per_lun = 2,
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|
.dma_boundary = PAGE_SIZE - 1,
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|
.cmd_size = sizeof(struct NCR5380_cmd),
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|
};
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|
|
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static int __init sun3_scsi_probe(struct platform_device *pdev)
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|
{
|
|
struct Scsi_Host *instance;
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struct NCR5380_hostdata *hostdata;
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|
int error;
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|
struct resource *irq, *mem;
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|
void __iomem *ioaddr;
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|
int host_flags = 0;
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|
#ifdef SUN3_SCSI_VME
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|
int i;
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|
#endif
|
|
|
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if (setup_can_queue > 0)
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sun3_scsi_template.can_queue = setup_can_queue;
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|
if (setup_cmd_per_lun > 0)
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|
sun3_scsi_template.cmd_per_lun = setup_cmd_per_lun;
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|
if (setup_sg_tablesize > 0)
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|
sun3_scsi_template.sg_tablesize = setup_sg_tablesize;
|
|
if (setup_hostid >= 0)
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|
sun3_scsi_template.this_id = setup_hostid & 7;
|
|
|
|
#ifdef SUN3_SCSI_VME
|
|
ioaddr = NULL;
|
|
for (i = 0; i < 2; i++) {
|
|
unsigned char x;
|
|
|
|
irq = platform_get_resource(pdev, IORESOURCE_IRQ, i);
|
|
mem = platform_get_resource(pdev, IORESOURCE_MEM, i);
|
|
if (!irq || !mem)
|
|
break;
|
|
|
|
ioaddr = sun3_ioremap(mem->start, resource_size(mem),
|
|
SUN3_PAGE_TYPE_VME16);
|
|
dregs = (struct sun3_dma_regs *)(ioaddr + 8);
|
|
|
|
if (sun3_map_test((unsigned long)dregs, &x)) {
|
|
unsigned short oldcsr;
|
|
|
|
oldcsr = dregs->csr;
|
|
dregs->csr = 0;
|
|
udelay(SUN3_DMA_DELAY);
|
|
if (dregs->csr == 0x1400)
|
|
break;
|
|
|
|
dregs->csr = oldcsr;
|
|
}
|
|
|
|
iounmap(ioaddr);
|
|
ioaddr = NULL;
|
|
}
|
|
if (!ioaddr)
|
|
return -ENODEV;
|
|
#else
|
|
irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
|
|
mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
|
if (!irq || !mem)
|
|
return -ENODEV;
|
|
|
|
ioaddr = ioremap(mem->start, resource_size(mem));
|
|
dregs = (struct sun3_dma_regs *)(ioaddr + 8);
|
|
|
|
udc_regs = dvma_malloc(sizeof(struct sun3_udc_regs));
|
|
if (!udc_regs) {
|
|
pr_err(PFX "couldn't allocate DVMA memory!\n");
|
|
iounmap(ioaddr);
|
|
return -ENOMEM;
|
|
}
|
|
#endif
|
|
|
|
instance = scsi_host_alloc(&sun3_scsi_template,
|
|
sizeof(struct NCR5380_hostdata));
|
|
if (!instance) {
|
|
error = -ENOMEM;
|
|
goto fail_alloc;
|
|
}
|
|
|
|
instance->irq = irq->start;
|
|
|
|
hostdata = shost_priv(instance);
|
|
hostdata->base = mem->start;
|
|
hostdata->io = ioaddr;
|
|
|
|
error = NCR5380_init(instance, host_flags);
|
|
if (error)
|
|
goto fail_init;
|
|
|
|
error = request_irq(instance->irq, scsi_sun3_intr, 0,
|
|
"NCR5380", instance);
|
|
if (error) {
|
|
pr_err(PFX "scsi%d: IRQ %d not free, bailing out\n",
|
|
instance->host_no, instance->irq);
|
|
goto fail_irq;
|
|
}
|
|
|
|
dregs->csr = 0;
|
|
udelay(SUN3_DMA_DELAY);
|
|
dregs->csr = CSR_SCSI | CSR_FIFO | CSR_INTR;
|
|
udelay(SUN3_DMA_DELAY);
|
|
dregs->fifo_count = 0;
|
|
#ifdef SUN3_SCSI_VME
|
|
dregs->fifo_count_hi = 0;
|
|
dregs->dma_addr_hi = 0;
|
|
dregs->dma_addr_lo = 0;
|
|
dregs->dma_count_hi = 0;
|
|
dregs->dma_count_lo = 0;
|
|
|
|
dregs->ivect = VME_DATA24 | (instance->irq & 0xff);
|
|
#endif
|
|
|
|
NCR5380_maybe_reset_bus(instance);
|
|
|
|
error = scsi_add_host(instance, NULL);
|
|
if (error)
|
|
goto fail_host;
|
|
|
|
platform_set_drvdata(pdev, instance);
|
|
|
|
scsi_scan_host(instance);
|
|
return 0;
|
|
|
|
fail_host:
|
|
free_irq(instance->irq, instance);
|
|
fail_irq:
|
|
NCR5380_exit(instance);
|
|
fail_init:
|
|
scsi_host_put(instance);
|
|
fail_alloc:
|
|
if (udc_regs)
|
|
dvma_free(udc_regs);
|
|
iounmap(ioaddr);
|
|
return error;
|
|
}
|
|
|
|
static void __exit sun3_scsi_remove(struct platform_device *pdev)
|
|
{
|
|
struct Scsi_Host *instance = platform_get_drvdata(pdev);
|
|
struct NCR5380_hostdata *hostdata = shost_priv(instance);
|
|
void __iomem *ioaddr = hostdata->io;
|
|
|
|
scsi_remove_host(instance);
|
|
free_irq(instance->irq, instance);
|
|
NCR5380_exit(instance);
|
|
scsi_host_put(instance);
|
|
if (udc_regs)
|
|
dvma_free(udc_regs);
|
|
iounmap(ioaddr);
|
|
}
|
|
|
|
static struct platform_driver sun3_scsi_driver = {
|
|
.remove_new = __exit_p(sun3_scsi_remove),
|
|
.driver = {
|
|
.name = DRV_MODULE_NAME,
|
|
},
|
|
};
|
|
|
|
module_platform_driver_probe(sun3_scsi_driver, sun3_scsi_probe);
|
|
|
|
MODULE_ALIAS("platform:" DRV_MODULE_NAME);
|
|
MODULE_LICENSE("GPL");
|