6650cdd9a8
A split-lock occurs when an atomic instruction operates on data that spans
two cache lines. In order to maintain atomicity the core takes a global bus
lock.
This is typically >1000 cycles slower than an atomic operation within a
cache line. It also disrupts performance on other cores (which must wait
for the bus lock to be released before their memory operations can
complete). For real-time systems this may mean missing deadlines. For other
systems it may just be very annoying.
Some CPUs have the capability to raise an #AC trap when a split lock is
attempted.
Provide a command line option to give the user choices on how to handle
this:
split_lock_detect=
off - not enabled (no traps for split locks)
warn - warn once when an application does a
split lock, but allow it to continue
running.
fatal - Send SIGBUS to applications that cause split lock
On systems that support split lock detection the default is "warn". Note
that if the kernel hits a split lock in any mode other than "off" it will
OOPs.
One implementation wrinkle is that the MSR to control the split lock
detection is per-core, not per thread. This might result in some short
lived races on HT systems in "warn" mode if Linux tries to enable on one
thread while disabling on the other. Race analysis by Sean Christopherson:
- Toggling of split-lock is only done in "warn" mode. Worst case
scenario of a race is that a misbehaving task will generate multiple
#AC exceptions on the same instruction. And this race will only occur
if both siblings are running tasks that generate split-lock #ACs, e.g.
a race where sibling threads are writing different values will only
occur if CPUx is disabling split-lock after an #AC and CPUy is
re-enabling split-lock after *its* previous task generated an #AC.
- Transitioning between off/warn/fatal modes at runtime isn't supported
and disabling is tracked per task, so hardware will always reach a steady
state that matches the configured mode. I.e. split-lock is guaranteed to
be enabled in hardware once all _TIF_SLD threads have been scheduled out.
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Co-developed-by: Fenghua Yu <fenghua.yu@intel.com>
Signed-off-by: Fenghua Yu <fenghua.yu@intel.com>
Co-developed-by: Tony Luck <tony.luck@intel.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Borislav Petkov <bp@suse.de>
Link: https://lore.kernel.org/r/20200126200535.GB30377@agluck-desk2.amr.corp.intel.com
56 lines
1.4 KiB
C
56 lines
1.4 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _ASM_X86_CPU_H
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#define _ASM_X86_CPU_H
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#include <linux/device.h>
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#include <linux/cpu.h>
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#include <linux/topology.h>
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#include <linux/nodemask.h>
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#include <linux/percpu.h>
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#ifdef CONFIG_SMP
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extern void prefill_possible_map(void);
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#else /* CONFIG_SMP */
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static inline void prefill_possible_map(void) {}
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#define cpu_physical_id(cpu) boot_cpu_physical_apicid
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#define cpu_acpi_id(cpu) 0
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#define safe_smp_processor_id() 0
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#endif /* CONFIG_SMP */
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struct x86_cpu {
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struct cpu cpu;
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};
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#ifdef CONFIG_HOTPLUG_CPU
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extern int arch_register_cpu(int num);
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extern void arch_unregister_cpu(int);
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extern void start_cpu0(void);
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#ifdef CONFIG_DEBUG_HOTPLUG_CPU0
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extern int _debug_hotplug_cpu(int cpu, int action);
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#endif
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#endif
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int mwait_usable(const struct cpuinfo_x86 *);
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unsigned int x86_family(unsigned int sig);
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unsigned int x86_model(unsigned int sig);
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unsigned int x86_stepping(unsigned int sig);
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#ifdef CONFIG_CPU_SUP_INTEL
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extern void __init cpu_set_core_cap_bits(struct cpuinfo_x86 *c);
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extern void switch_to_sld(unsigned long tifn);
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extern bool handle_user_split_lock(struct pt_regs *regs, long error_code);
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#else
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static inline void __init cpu_set_core_cap_bits(struct cpuinfo_x86 *c) {}
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static inline void switch_to_sld(unsigned long tifn) {}
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static inline bool handle_user_split_lock(struct pt_regs *regs, long error_code)
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{
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return false;
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}
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#endif
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#endif /* _ASM_X86_CPU_H */
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