Current code uses many different types when dealing with a port of a RDMA device: u8, unsigned int and u32. Switch to u32 to clean up the logic. This allows us to make (at least) the core view consistent and use the same type. Unfortunately not all places can be converted. Many uverbs functions expect port to be u8 so keep those places in order not to break UAPIs. HW/Spec defined values must also not be changed. With the switch to u32 we now can support devices with more than 255 ports. U32_MAX is reserved to make control logic a bit easier to deal with. As a device with U32_MAX ports probably isn't going to happen any time soon this seems like a non issue. When a device with more than 255 ports is created uverbs will report the RDMA device as having 255 ports as this is the max currently supported. The verbs interface is not changed yet because the IBTA spec limits the port size in too many places to be u8 and all applications that relies in verbs won't be able to cope with this change. At this stage, we are extending the interfaces that are using vendor channel solely Once the limitation is lifted mlx5 in switchdev mode will be able to have thousands of SFs created by the device. As the only instance of an RDMA device that reports more than 255 ports will be a representor device and it exposes itself as a RAW Ethernet only device CM/MAD/IPoIB and other ULPs aren't effected by this change and their sysfs/interfaces that are exposes to userspace can remain unchanged. While here cleanup some alignment issues and remove unneeded sanity checks (mainly in rdmavt), Link: https://lore.kernel.org/r/20210301070420.439400-1-leon@kernel.org Signed-off-by: Mark Bloch <mbloch@nvidia.com> Signed-off-by: Leon Romanovsky <leonro@nvidia.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
1158 lines
30 KiB
C
1158 lines
30 KiB
C
/*
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* Copyright (c) 2012-2016 VMware, Inc. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of EITHER the GNU General Public License
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* version 2 as published by the Free Software Foundation or the BSD
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* 2-Clause License. This program is distributed in the hope that it
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* will be useful, but WITHOUT ANY WARRANTY; WITHOUT EVEN THE IMPLIED
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* WARRANTY OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE.
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* See the GNU General Public License version 2 for more details at
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* http://www.gnu.org/licenses/old-licenses/gpl-2.0.en.html.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program available in the file COPYING in the main
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* directory of this source tree.
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*
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* The BSD 2-Clause License
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*
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* Redistribution and use in source and binary forms, with or
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* without modification, are permitted provided that the following
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* conditions are met:
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*
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* - Redistributions of source code must retain the above
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* copyright notice, this list of conditions and the following
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* disclaimer.
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*
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* - Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials
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* provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
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* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
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* OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <linux/errno.h>
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#include <linux/inetdevice.h>
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/slab.h>
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#include <rdma/ib_addr.h>
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#include <rdma/ib_smi.h>
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#include <rdma/ib_user_verbs.h>
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#include <net/addrconf.h>
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#include "pvrdma.h"
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#define DRV_NAME "vmw_pvrdma"
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#define DRV_VERSION "1.0.1.0-k"
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static DEFINE_MUTEX(pvrdma_device_list_lock);
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static LIST_HEAD(pvrdma_device_list);
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static struct workqueue_struct *event_wq;
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static int pvrdma_add_gid(const struct ib_gid_attr *attr, void **context);
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static int pvrdma_del_gid(const struct ib_gid_attr *attr, void **context);
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static ssize_t hca_type_show(struct device *device,
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struct device_attribute *attr, char *buf)
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{
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return sysfs_emit(buf, "VMW_PVRDMA-%s\n", DRV_VERSION);
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}
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static DEVICE_ATTR_RO(hca_type);
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static ssize_t hw_rev_show(struct device *device,
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struct device_attribute *attr, char *buf)
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{
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return sysfs_emit(buf, "%d\n", PVRDMA_REV_ID);
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}
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static DEVICE_ATTR_RO(hw_rev);
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static ssize_t board_id_show(struct device *device,
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struct device_attribute *attr, char *buf)
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{
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return sysfs_emit(buf, "%d\n", PVRDMA_BOARD_ID);
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}
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static DEVICE_ATTR_RO(board_id);
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static struct attribute *pvrdma_class_attributes[] = {
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&dev_attr_hw_rev.attr,
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&dev_attr_hca_type.attr,
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&dev_attr_board_id.attr,
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NULL,
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};
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static const struct attribute_group pvrdma_attr_group = {
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.attrs = pvrdma_class_attributes,
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};
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static void pvrdma_get_fw_ver_str(struct ib_device *device, char *str)
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{
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struct pvrdma_dev *dev =
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container_of(device, struct pvrdma_dev, ib_dev);
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snprintf(str, IB_FW_VERSION_NAME_MAX, "%d.%d.%d\n",
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(int) (dev->dsr->caps.fw_ver >> 32),
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(int) (dev->dsr->caps.fw_ver >> 16) & 0xffff,
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(int) dev->dsr->caps.fw_ver & 0xffff);
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}
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static int pvrdma_init_device(struct pvrdma_dev *dev)
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{
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/* Initialize some device related stuff */
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spin_lock_init(&dev->cmd_lock);
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sema_init(&dev->cmd_sema, 1);
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atomic_set(&dev->num_qps, 0);
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atomic_set(&dev->num_srqs, 0);
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atomic_set(&dev->num_cqs, 0);
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atomic_set(&dev->num_pds, 0);
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atomic_set(&dev->num_ahs, 0);
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return 0;
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}
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static int pvrdma_port_immutable(struct ib_device *ibdev, u32 port_num,
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struct ib_port_immutable *immutable)
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{
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struct pvrdma_dev *dev = to_vdev(ibdev);
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struct ib_port_attr attr;
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int err;
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if (dev->dsr->caps.gid_types == PVRDMA_GID_TYPE_FLAG_ROCE_V1)
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immutable->core_cap_flags |= RDMA_CORE_PORT_IBA_ROCE;
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else if (dev->dsr->caps.gid_types == PVRDMA_GID_TYPE_FLAG_ROCE_V2)
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immutable->core_cap_flags |= RDMA_CORE_PORT_IBA_ROCE_UDP_ENCAP;
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err = ib_query_port(ibdev, port_num, &attr);
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if (err)
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return err;
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immutable->pkey_tbl_len = attr.pkey_tbl_len;
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immutable->gid_tbl_len = attr.gid_tbl_len;
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immutable->max_mad_size = IB_MGMT_MAD_SIZE;
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return 0;
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}
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static const struct ib_device_ops pvrdma_dev_ops = {
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.owner = THIS_MODULE,
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.driver_id = RDMA_DRIVER_VMW_PVRDMA,
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.uverbs_abi_ver = PVRDMA_UVERBS_ABI_VERSION,
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.add_gid = pvrdma_add_gid,
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.alloc_mr = pvrdma_alloc_mr,
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.alloc_pd = pvrdma_alloc_pd,
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.alloc_ucontext = pvrdma_alloc_ucontext,
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.create_ah = pvrdma_create_ah,
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.create_cq = pvrdma_create_cq,
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.create_qp = pvrdma_create_qp,
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.dealloc_pd = pvrdma_dealloc_pd,
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.dealloc_ucontext = pvrdma_dealloc_ucontext,
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.del_gid = pvrdma_del_gid,
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.dereg_mr = pvrdma_dereg_mr,
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.destroy_ah = pvrdma_destroy_ah,
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.destroy_cq = pvrdma_destroy_cq,
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.destroy_qp = pvrdma_destroy_qp,
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.get_dev_fw_str = pvrdma_get_fw_ver_str,
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.get_dma_mr = pvrdma_get_dma_mr,
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.get_link_layer = pvrdma_port_link_layer,
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.get_port_immutable = pvrdma_port_immutable,
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.map_mr_sg = pvrdma_map_mr_sg,
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.mmap = pvrdma_mmap,
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.modify_port = pvrdma_modify_port,
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.modify_qp = pvrdma_modify_qp,
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.poll_cq = pvrdma_poll_cq,
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.post_recv = pvrdma_post_recv,
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.post_send = pvrdma_post_send,
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.query_device = pvrdma_query_device,
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.query_gid = pvrdma_query_gid,
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.query_pkey = pvrdma_query_pkey,
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.query_port = pvrdma_query_port,
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.query_qp = pvrdma_query_qp,
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.reg_user_mr = pvrdma_reg_user_mr,
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.req_notify_cq = pvrdma_req_notify_cq,
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INIT_RDMA_OBJ_SIZE(ib_ah, pvrdma_ah, ibah),
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INIT_RDMA_OBJ_SIZE(ib_cq, pvrdma_cq, ibcq),
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INIT_RDMA_OBJ_SIZE(ib_pd, pvrdma_pd, ibpd),
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INIT_RDMA_OBJ_SIZE(ib_ucontext, pvrdma_ucontext, ibucontext),
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};
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static const struct ib_device_ops pvrdma_dev_srq_ops = {
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.create_srq = pvrdma_create_srq,
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.destroy_srq = pvrdma_destroy_srq,
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.modify_srq = pvrdma_modify_srq,
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.query_srq = pvrdma_query_srq,
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INIT_RDMA_OBJ_SIZE(ib_srq, pvrdma_srq, ibsrq),
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};
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static int pvrdma_register_device(struct pvrdma_dev *dev)
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{
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int ret = -1;
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dev->ib_dev.node_guid = dev->dsr->caps.node_guid;
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dev->sys_image_guid = dev->dsr->caps.sys_image_guid;
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dev->flags = 0;
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dev->ib_dev.num_comp_vectors = 1;
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dev->ib_dev.dev.parent = &dev->pdev->dev;
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dev->ib_dev.node_type = RDMA_NODE_IB_CA;
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dev->ib_dev.phys_port_cnt = dev->dsr->caps.phys_port_cnt;
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ib_set_device_ops(&dev->ib_dev, &pvrdma_dev_ops);
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mutex_init(&dev->port_mutex);
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spin_lock_init(&dev->desc_lock);
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dev->cq_tbl = kcalloc(dev->dsr->caps.max_cq, sizeof(struct pvrdma_cq *),
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GFP_KERNEL);
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if (!dev->cq_tbl)
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return ret;
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spin_lock_init(&dev->cq_tbl_lock);
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dev->qp_tbl = kcalloc(dev->dsr->caps.max_qp, sizeof(struct pvrdma_qp *),
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GFP_KERNEL);
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if (!dev->qp_tbl)
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goto err_cq_free;
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spin_lock_init(&dev->qp_tbl_lock);
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/* Check if SRQ is supported by backend */
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if (dev->dsr->caps.max_srq) {
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ib_set_device_ops(&dev->ib_dev, &pvrdma_dev_srq_ops);
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dev->srq_tbl = kcalloc(dev->dsr->caps.max_srq,
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sizeof(struct pvrdma_srq *),
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GFP_KERNEL);
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if (!dev->srq_tbl)
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goto err_qp_free;
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}
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ret = ib_device_set_netdev(&dev->ib_dev, dev->netdev, 1);
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if (ret)
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goto err_srq_free;
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spin_lock_init(&dev->srq_tbl_lock);
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rdma_set_device_sysfs_group(&dev->ib_dev, &pvrdma_attr_group);
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ret = ib_register_device(&dev->ib_dev, "vmw_pvrdma%d", &dev->pdev->dev);
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if (ret)
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goto err_srq_free;
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dev->ib_active = true;
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return 0;
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err_srq_free:
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kfree(dev->srq_tbl);
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err_qp_free:
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kfree(dev->qp_tbl);
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err_cq_free:
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kfree(dev->cq_tbl);
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return ret;
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}
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static irqreturn_t pvrdma_intr0_handler(int irq, void *dev_id)
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{
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u32 icr = PVRDMA_INTR_CAUSE_RESPONSE;
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struct pvrdma_dev *dev = dev_id;
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dev_dbg(&dev->pdev->dev, "interrupt 0 (response) handler\n");
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if (!dev->pdev->msix_enabled) {
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/* Legacy intr */
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icr = pvrdma_read_reg(dev, PVRDMA_REG_ICR);
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if (icr == 0)
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return IRQ_NONE;
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}
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if (icr == PVRDMA_INTR_CAUSE_RESPONSE)
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complete(&dev->cmd_done);
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return IRQ_HANDLED;
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}
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static void pvrdma_qp_event(struct pvrdma_dev *dev, u32 qpn, int type)
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{
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struct pvrdma_qp *qp;
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unsigned long flags;
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spin_lock_irqsave(&dev->qp_tbl_lock, flags);
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qp = dev->qp_tbl[qpn % dev->dsr->caps.max_qp];
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if (qp)
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refcount_inc(&qp->refcnt);
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spin_unlock_irqrestore(&dev->qp_tbl_lock, flags);
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if (qp && qp->ibqp.event_handler) {
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struct ib_qp *ibqp = &qp->ibqp;
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struct ib_event e;
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e.device = ibqp->device;
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e.element.qp = ibqp;
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e.event = type; /* 1:1 mapping for now. */
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ibqp->event_handler(&e, ibqp->qp_context);
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}
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if (qp) {
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if (refcount_dec_and_test(&qp->refcnt))
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complete(&qp->free);
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}
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}
|
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|
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static void pvrdma_cq_event(struct pvrdma_dev *dev, u32 cqn, int type)
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{
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struct pvrdma_cq *cq;
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unsigned long flags;
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spin_lock_irqsave(&dev->cq_tbl_lock, flags);
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cq = dev->cq_tbl[cqn % dev->dsr->caps.max_cq];
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if (cq)
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refcount_inc(&cq->refcnt);
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spin_unlock_irqrestore(&dev->cq_tbl_lock, flags);
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if (cq && cq->ibcq.event_handler) {
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struct ib_cq *ibcq = &cq->ibcq;
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struct ib_event e;
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e.device = ibcq->device;
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e.element.cq = ibcq;
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e.event = type; /* 1:1 mapping for now. */
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ibcq->event_handler(&e, ibcq->cq_context);
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}
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if (cq) {
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if (refcount_dec_and_test(&cq->refcnt))
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complete(&cq->free);
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}
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}
|
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|
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static void pvrdma_srq_event(struct pvrdma_dev *dev, u32 srqn, int type)
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{
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struct pvrdma_srq *srq;
|
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unsigned long flags;
|
|
|
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spin_lock_irqsave(&dev->srq_tbl_lock, flags);
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if (dev->srq_tbl)
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|
srq = dev->srq_tbl[srqn % dev->dsr->caps.max_srq];
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else
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srq = NULL;
|
|
if (srq)
|
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refcount_inc(&srq->refcnt);
|
|
spin_unlock_irqrestore(&dev->srq_tbl_lock, flags);
|
|
|
|
if (srq && srq->ibsrq.event_handler) {
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|
struct ib_srq *ibsrq = &srq->ibsrq;
|
|
struct ib_event e;
|
|
|
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e.device = ibsrq->device;
|
|
e.element.srq = ibsrq;
|
|
e.event = type; /* 1:1 mapping for now. */
|
|
ibsrq->event_handler(&e, ibsrq->srq_context);
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|
}
|
|
if (srq) {
|
|
if (refcount_dec_and_test(&srq->refcnt))
|
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complete(&srq->free);
|
|
}
|
|
}
|
|
|
|
static void pvrdma_dispatch_event(struct pvrdma_dev *dev, int port,
|
|
enum ib_event_type event)
|
|
{
|
|
struct ib_event ib_event;
|
|
|
|
memset(&ib_event, 0, sizeof(ib_event));
|
|
ib_event.device = &dev->ib_dev;
|
|
ib_event.element.port_num = port;
|
|
ib_event.event = event;
|
|
ib_dispatch_event(&ib_event);
|
|
}
|
|
|
|
static void pvrdma_dev_event(struct pvrdma_dev *dev, u8 port, int type)
|
|
{
|
|
if (port < 1 || port > dev->dsr->caps.phys_port_cnt) {
|
|
dev_warn(&dev->pdev->dev, "event on port %d\n", port);
|
|
return;
|
|
}
|
|
|
|
pvrdma_dispatch_event(dev, port, type);
|
|
}
|
|
|
|
static inline struct pvrdma_eqe *get_eqe(struct pvrdma_dev *dev, unsigned int i)
|
|
{
|
|
return (struct pvrdma_eqe *)pvrdma_page_dir_get_ptr(
|
|
&dev->async_pdir,
|
|
PAGE_SIZE +
|
|
sizeof(struct pvrdma_eqe) * i);
|
|
}
|
|
|
|
static irqreturn_t pvrdma_intr1_handler(int irq, void *dev_id)
|
|
{
|
|
struct pvrdma_dev *dev = dev_id;
|
|
struct pvrdma_ring *ring = &dev->async_ring_state->rx;
|
|
int ring_slots = (dev->dsr->async_ring_pages.num_pages - 1) *
|
|
PAGE_SIZE / sizeof(struct pvrdma_eqe);
|
|
unsigned int head;
|
|
|
|
dev_dbg(&dev->pdev->dev, "interrupt 1 (async event) handler\n");
|
|
|
|
/*
|
|
* Don't process events until the IB device is registered. Otherwise
|
|
* we'll try to ib_dispatch_event() on an invalid device.
|
|
*/
|
|
if (!dev->ib_active)
|
|
return IRQ_HANDLED;
|
|
|
|
while (pvrdma_idx_ring_has_data(ring, ring_slots, &head) > 0) {
|
|
struct pvrdma_eqe *eqe;
|
|
|
|
eqe = get_eqe(dev, head);
|
|
|
|
switch (eqe->type) {
|
|
case PVRDMA_EVENT_QP_FATAL:
|
|
case PVRDMA_EVENT_QP_REQ_ERR:
|
|
case PVRDMA_EVENT_QP_ACCESS_ERR:
|
|
case PVRDMA_EVENT_COMM_EST:
|
|
case PVRDMA_EVENT_SQ_DRAINED:
|
|
case PVRDMA_EVENT_PATH_MIG:
|
|
case PVRDMA_EVENT_PATH_MIG_ERR:
|
|
case PVRDMA_EVENT_QP_LAST_WQE_REACHED:
|
|
pvrdma_qp_event(dev, eqe->info, eqe->type);
|
|
break;
|
|
|
|
case PVRDMA_EVENT_CQ_ERR:
|
|
pvrdma_cq_event(dev, eqe->info, eqe->type);
|
|
break;
|
|
|
|
case PVRDMA_EVENT_SRQ_ERR:
|
|
case PVRDMA_EVENT_SRQ_LIMIT_REACHED:
|
|
pvrdma_srq_event(dev, eqe->info, eqe->type);
|
|
break;
|
|
|
|
case PVRDMA_EVENT_PORT_ACTIVE:
|
|
case PVRDMA_EVENT_PORT_ERR:
|
|
case PVRDMA_EVENT_LID_CHANGE:
|
|
case PVRDMA_EVENT_PKEY_CHANGE:
|
|
case PVRDMA_EVENT_SM_CHANGE:
|
|
case PVRDMA_EVENT_CLIENT_REREGISTER:
|
|
case PVRDMA_EVENT_GID_CHANGE:
|
|
pvrdma_dev_event(dev, eqe->info, eqe->type);
|
|
break;
|
|
|
|
case PVRDMA_EVENT_DEVICE_FATAL:
|
|
pvrdma_dev_event(dev, 1, eqe->type);
|
|
break;
|
|
|
|
default:
|
|
break;
|
|
}
|
|
|
|
pvrdma_idx_ring_inc(&ring->cons_head, ring_slots);
|
|
}
|
|
|
|
return IRQ_HANDLED;
|
|
}
|
|
|
|
static inline struct pvrdma_cqne *get_cqne(struct pvrdma_dev *dev,
|
|
unsigned int i)
|
|
{
|
|
return (struct pvrdma_cqne *)pvrdma_page_dir_get_ptr(
|
|
&dev->cq_pdir,
|
|
PAGE_SIZE +
|
|
sizeof(struct pvrdma_cqne) * i);
|
|
}
|
|
|
|
static irqreturn_t pvrdma_intrx_handler(int irq, void *dev_id)
|
|
{
|
|
struct pvrdma_dev *dev = dev_id;
|
|
struct pvrdma_ring *ring = &dev->cq_ring_state->rx;
|
|
int ring_slots = (dev->dsr->cq_ring_pages.num_pages - 1) * PAGE_SIZE /
|
|
sizeof(struct pvrdma_cqne);
|
|
unsigned int head;
|
|
|
|
dev_dbg(&dev->pdev->dev, "interrupt x (completion) handler\n");
|
|
|
|
while (pvrdma_idx_ring_has_data(ring, ring_slots, &head) > 0) {
|
|
struct pvrdma_cqne *cqne;
|
|
struct pvrdma_cq *cq;
|
|
|
|
cqne = get_cqne(dev, head);
|
|
spin_lock(&dev->cq_tbl_lock);
|
|
cq = dev->cq_tbl[cqne->info % dev->dsr->caps.max_cq];
|
|
if (cq)
|
|
refcount_inc(&cq->refcnt);
|
|
spin_unlock(&dev->cq_tbl_lock);
|
|
|
|
if (cq && cq->ibcq.comp_handler)
|
|
cq->ibcq.comp_handler(&cq->ibcq, cq->ibcq.cq_context);
|
|
if (cq) {
|
|
if (refcount_dec_and_test(&cq->refcnt))
|
|
complete(&cq->free);
|
|
}
|
|
pvrdma_idx_ring_inc(&ring->cons_head, ring_slots);
|
|
}
|
|
|
|
return IRQ_HANDLED;
|
|
}
|
|
|
|
static void pvrdma_free_irq(struct pvrdma_dev *dev)
|
|
{
|
|
int i;
|
|
|
|
dev_dbg(&dev->pdev->dev, "freeing interrupts\n");
|
|
for (i = 0; i < dev->nr_vectors; i++)
|
|
free_irq(pci_irq_vector(dev->pdev, i), dev);
|
|
}
|
|
|
|
static void pvrdma_enable_intrs(struct pvrdma_dev *dev)
|
|
{
|
|
dev_dbg(&dev->pdev->dev, "enable interrupts\n");
|
|
pvrdma_write_reg(dev, PVRDMA_REG_IMR, 0);
|
|
}
|
|
|
|
static void pvrdma_disable_intrs(struct pvrdma_dev *dev)
|
|
{
|
|
dev_dbg(&dev->pdev->dev, "disable interrupts\n");
|
|
pvrdma_write_reg(dev, PVRDMA_REG_IMR, ~0);
|
|
}
|
|
|
|
static int pvrdma_alloc_intrs(struct pvrdma_dev *dev)
|
|
{
|
|
struct pci_dev *pdev = dev->pdev;
|
|
int ret = 0, i;
|
|
|
|
ret = pci_alloc_irq_vectors(pdev, 1, PVRDMA_MAX_INTERRUPTS,
|
|
PCI_IRQ_MSIX);
|
|
if (ret < 0) {
|
|
ret = pci_alloc_irq_vectors(pdev, 1, 1,
|
|
PCI_IRQ_MSI | PCI_IRQ_LEGACY);
|
|
if (ret < 0)
|
|
return ret;
|
|
}
|
|
dev->nr_vectors = ret;
|
|
|
|
ret = request_irq(pci_irq_vector(dev->pdev, 0), pvrdma_intr0_handler,
|
|
pdev->msix_enabled ? 0 : IRQF_SHARED, DRV_NAME, dev);
|
|
if (ret) {
|
|
dev_err(&dev->pdev->dev,
|
|
"failed to request interrupt 0\n");
|
|
goto out_free_vectors;
|
|
}
|
|
|
|
for (i = 1; i < dev->nr_vectors; i++) {
|
|
ret = request_irq(pci_irq_vector(dev->pdev, i),
|
|
i == 1 ? pvrdma_intr1_handler :
|
|
pvrdma_intrx_handler,
|
|
0, DRV_NAME, dev);
|
|
if (ret) {
|
|
dev_err(&dev->pdev->dev,
|
|
"failed to request interrupt %d\n", i);
|
|
goto free_irqs;
|
|
}
|
|
}
|
|
|
|
return 0;
|
|
|
|
free_irqs:
|
|
while (--i >= 0)
|
|
free_irq(pci_irq_vector(dev->pdev, i), dev);
|
|
out_free_vectors:
|
|
pci_free_irq_vectors(pdev);
|
|
return ret;
|
|
}
|
|
|
|
static void pvrdma_free_slots(struct pvrdma_dev *dev)
|
|
{
|
|
struct pci_dev *pdev = dev->pdev;
|
|
|
|
if (dev->resp_slot)
|
|
dma_free_coherent(&pdev->dev, PAGE_SIZE, dev->resp_slot,
|
|
dev->dsr->resp_slot_dma);
|
|
if (dev->cmd_slot)
|
|
dma_free_coherent(&pdev->dev, PAGE_SIZE, dev->cmd_slot,
|
|
dev->dsr->cmd_slot_dma);
|
|
}
|
|
|
|
static int pvrdma_add_gid_at_index(struct pvrdma_dev *dev,
|
|
const union ib_gid *gid,
|
|
u8 gid_type,
|
|
int index)
|
|
{
|
|
int ret;
|
|
union pvrdma_cmd_req req;
|
|
struct pvrdma_cmd_create_bind *cmd_bind = &req.create_bind;
|
|
|
|
if (!dev->sgid_tbl) {
|
|
dev_warn(&dev->pdev->dev, "sgid table not initialized\n");
|
|
return -EINVAL;
|
|
}
|
|
|
|
memset(cmd_bind, 0, sizeof(*cmd_bind));
|
|
cmd_bind->hdr.cmd = PVRDMA_CMD_CREATE_BIND;
|
|
memcpy(cmd_bind->new_gid, gid->raw, 16);
|
|
cmd_bind->mtu = ib_mtu_enum_to_int(IB_MTU_1024);
|
|
cmd_bind->vlan = 0xfff;
|
|
cmd_bind->index = index;
|
|
cmd_bind->gid_type = gid_type;
|
|
|
|
ret = pvrdma_cmd_post(dev, &req, NULL, 0);
|
|
if (ret < 0) {
|
|
dev_warn(&dev->pdev->dev,
|
|
"could not create binding, error: %d\n", ret);
|
|
return -EFAULT;
|
|
}
|
|
memcpy(&dev->sgid_tbl[index], gid, sizeof(*gid));
|
|
return 0;
|
|
}
|
|
|
|
static int pvrdma_add_gid(const struct ib_gid_attr *attr, void **context)
|
|
{
|
|
struct pvrdma_dev *dev = to_vdev(attr->device);
|
|
|
|
return pvrdma_add_gid_at_index(dev, &attr->gid,
|
|
ib_gid_type_to_pvrdma(attr->gid_type),
|
|
attr->index);
|
|
}
|
|
|
|
static int pvrdma_del_gid_at_index(struct pvrdma_dev *dev, int index)
|
|
{
|
|
int ret;
|
|
union pvrdma_cmd_req req;
|
|
struct pvrdma_cmd_destroy_bind *cmd_dest = &req.destroy_bind;
|
|
|
|
/* Update sgid table. */
|
|
if (!dev->sgid_tbl) {
|
|
dev_warn(&dev->pdev->dev, "sgid table not initialized\n");
|
|
return -EINVAL;
|
|
}
|
|
|
|
memset(cmd_dest, 0, sizeof(*cmd_dest));
|
|
cmd_dest->hdr.cmd = PVRDMA_CMD_DESTROY_BIND;
|
|
memcpy(cmd_dest->dest_gid, &dev->sgid_tbl[index], 16);
|
|
cmd_dest->index = index;
|
|
|
|
ret = pvrdma_cmd_post(dev, &req, NULL, 0);
|
|
if (ret < 0) {
|
|
dev_warn(&dev->pdev->dev,
|
|
"could not destroy binding, error: %d\n", ret);
|
|
return ret;
|
|
}
|
|
memset(&dev->sgid_tbl[index], 0, 16);
|
|
return 0;
|
|
}
|
|
|
|
static int pvrdma_del_gid(const struct ib_gid_attr *attr, void **context)
|
|
{
|
|
struct pvrdma_dev *dev = to_vdev(attr->device);
|
|
|
|
dev_dbg(&dev->pdev->dev, "removing gid at index %u from %s",
|
|
attr->index, dev->netdev->name);
|
|
|
|
return pvrdma_del_gid_at_index(dev, attr->index);
|
|
}
|
|
|
|
static void pvrdma_netdevice_event_handle(struct pvrdma_dev *dev,
|
|
struct net_device *ndev,
|
|
unsigned long event)
|
|
{
|
|
struct pci_dev *pdev_net;
|
|
unsigned int slot;
|
|
|
|
switch (event) {
|
|
case NETDEV_REBOOT:
|
|
case NETDEV_DOWN:
|
|
pvrdma_dispatch_event(dev, 1, IB_EVENT_PORT_ERR);
|
|
break;
|
|
case NETDEV_UP:
|
|
pvrdma_write_reg(dev, PVRDMA_REG_CTL,
|
|
PVRDMA_DEVICE_CTL_UNQUIESCE);
|
|
|
|
mb();
|
|
|
|
if (pvrdma_read_reg(dev, PVRDMA_REG_ERR))
|
|
dev_err(&dev->pdev->dev,
|
|
"failed to activate device during link up\n");
|
|
else
|
|
pvrdma_dispatch_event(dev, 1, IB_EVENT_PORT_ACTIVE);
|
|
break;
|
|
case NETDEV_UNREGISTER:
|
|
ib_device_set_netdev(&dev->ib_dev, NULL, 1);
|
|
dev_put(dev->netdev);
|
|
dev->netdev = NULL;
|
|
break;
|
|
case NETDEV_REGISTER:
|
|
/* vmxnet3 will have same bus, slot. But func will be 0 */
|
|
slot = PCI_SLOT(dev->pdev->devfn);
|
|
pdev_net = pci_get_slot(dev->pdev->bus,
|
|
PCI_DEVFN(slot, 0));
|
|
if ((dev->netdev == NULL) &&
|
|
(pci_get_drvdata(pdev_net) == ndev)) {
|
|
/* this is our netdev */
|
|
ib_device_set_netdev(&dev->ib_dev, ndev, 1);
|
|
dev->netdev = ndev;
|
|
dev_hold(ndev);
|
|
}
|
|
pci_dev_put(pdev_net);
|
|
break;
|
|
|
|
default:
|
|
dev_dbg(&dev->pdev->dev, "ignore netdevice event %ld on %s\n",
|
|
event, dev_name(&dev->ib_dev.dev));
|
|
break;
|
|
}
|
|
}
|
|
|
|
static void pvrdma_netdevice_event_work(struct work_struct *work)
|
|
{
|
|
struct pvrdma_netdevice_work *netdev_work;
|
|
struct pvrdma_dev *dev;
|
|
|
|
netdev_work = container_of(work, struct pvrdma_netdevice_work, work);
|
|
|
|
mutex_lock(&pvrdma_device_list_lock);
|
|
list_for_each_entry(dev, &pvrdma_device_list, device_link) {
|
|
if ((netdev_work->event == NETDEV_REGISTER) ||
|
|
(dev->netdev == netdev_work->event_netdev)) {
|
|
pvrdma_netdevice_event_handle(dev,
|
|
netdev_work->event_netdev,
|
|
netdev_work->event);
|
|
break;
|
|
}
|
|
}
|
|
mutex_unlock(&pvrdma_device_list_lock);
|
|
|
|
kfree(netdev_work);
|
|
}
|
|
|
|
static int pvrdma_netdevice_event(struct notifier_block *this,
|
|
unsigned long event, void *ptr)
|
|
{
|
|
struct net_device *event_netdev = netdev_notifier_info_to_dev(ptr);
|
|
struct pvrdma_netdevice_work *netdev_work;
|
|
|
|
netdev_work = kmalloc(sizeof(*netdev_work), GFP_ATOMIC);
|
|
if (!netdev_work)
|
|
return NOTIFY_BAD;
|
|
|
|
INIT_WORK(&netdev_work->work, pvrdma_netdevice_event_work);
|
|
netdev_work->event_netdev = event_netdev;
|
|
netdev_work->event = event;
|
|
queue_work(event_wq, &netdev_work->work);
|
|
|
|
return NOTIFY_DONE;
|
|
}
|
|
|
|
static int pvrdma_pci_probe(struct pci_dev *pdev,
|
|
const struct pci_device_id *id)
|
|
{
|
|
struct pci_dev *pdev_net;
|
|
struct pvrdma_dev *dev;
|
|
int ret;
|
|
unsigned long start;
|
|
unsigned long len;
|
|
dma_addr_t slot_dma = 0;
|
|
|
|
dev_dbg(&pdev->dev, "initializing driver %s\n", pci_name(pdev));
|
|
|
|
/* Allocate zero-out device */
|
|
dev = ib_alloc_device(pvrdma_dev, ib_dev);
|
|
if (!dev) {
|
|
dev_err(&pdev->dev, "failed to allocate IB device\n");
|
|
return -ENOMEM;
|
|
}
|
|
|
|
mutex_lock(&pvrdma_device_list_lock);
|
|
list_add(&dev->device_link, &pvrdma_device_list);
|
|
mutex_unlock(&pvrdma_device_list_lock);
|
|
|
|
ret = pvrdma_init_device(dev);
|
|
if (ret)
|
|
goto err_free_device;
|
|
|
|
dev->pdev = pdev;
|
|
pci_set_drvdata(pdev, dev);
|
|
|
|
ret = pci_enable_device(pdev);
|
|
if (ret) {
|
|
dev_err(&pdev->dev, "cannot enable PCI device\n");
|
|
goto err_free_device;
|
|
}
|
|
|
|
dev_dbg(&pdev->dev, "PCI resource flags BAR0 %#lx\n",
|
|
pci_resource_flags(pdev, 0));
|
|
dev_dbg(&pdev->dev, "PCI resource len %#llx\n",
|
|
(unsigned long long)pci_resource_len(pdev, 0));
|
|
dev_dbg(&pdev->dev, "PCI resource start %#llx\n",
|
|
(unsigned long long)pci_resource_start(pdev, 0));
|
|
dev_dbg(&pdev->dev, "PCI resource flags BAR1 %#lx\n",
|
|
pci_resource_flags(pdev, 1));
|
|
dev_dbg(&pdev->dev, "PCI resource len %#llx\n",
|
|
(unsigned long long)pci_resource_len(pdev, 1));
|
|
dev_dbg(&pdev->dev, "PCI resource start %#llx\n",
|
|
(unsigned long long)pci_resource_start(pdev, 1));
|
|
|
|
if (!(pci_resource_flags(pdev, 0) & IORESOURCE_MEM) ||
|
|
!(pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
|
|
dev_err(&pdev->dev, "PCI BAR region not MMIO\n");
|
|
ret = -ENOMEM;
|
|
goto err_disable_pdev;
|
|
}
|
|
|
|
ret = pci_request_regions(pdev, DRV_NAME);
|
|
if (ret) {
|
|
dev_err(&pdev->dev, "cannot request PCI resources\n");
|
|
goto err_disable_pdev;
|
|
}
|
|
|
|
/* Enable 64-Bit DMA */
|
|
if (pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) == 0) {
|
|
ret = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64));
|
|
if (ret != 0) {
|
|
dev_err(&pdev->dev,
|
|
"pci_set_consistent_dma_mask failed\n");
|
|
goto err_free_resource;
|
|
}
|
|
} else {
|
|
ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
|
|
if (ret != 0) {
|
|
dev_err(&pdev->dev,
|
|
"pci_set_dma_mask failed\n");
|
|
goto err_free_resource;
|
|
}
|
|
}
|
|
dma_set_max_seg_size(&pdev->dev, UINT_MAX);
|
|
pci_set_master(pdev);
|
|
|
|
/* Map register space */
|
|
start = pci_resource_start(dev->pdev, PVRDMA_PCI_RESOURCE_REG);
|
|
len = pci_resource_len(dev->pdev, PVRDMA_PCI_RESOURCE_REG);
|
|
dev->regs = ioremap(start, len);
|
|
if (!dev->regs) {
|
|
dev_err(&pdev->dev, "register mapping failed\n");
|
|
ret = -ENOMEM;
|
|
goto err_free_resource;
|
|
}
|
|
|
|
/* Setup per-device UAR. */
|
|
dev->driver_uar.index = 0;
|
|
dev->driver_uar.pfn =
|
|
pci_resource_start(dev->pdev, PVRDMA_PCI_RESOURCE_UAR) >>
|
|
PAGE_SHIFT;
|
|
dev->driver_uar.map =
|
|
ioremap(dev->driver_uar.pfn << PAGE_SHIFT, PAGE_SIZE);
|
|
if (!dev->driver_uar.map) {
|
|
dev_err(&pdev->dev, "failed to remap UAR pages\n");
|
|
ret = -ENOMEM;
|
|
goto err_unmap_regs;
|
|
}
|
|
|
|
dev->dsr_version = pvrdma_read_reg(dev, PVRDMA_REG_VERSION);
|
|
dev_info(&pdev->dev, "device version %d, driver version %d\n",
|
|
dev->dsr_version, PVRDMA_VERSION);
|
|
|
|
dev->dsr = dma_alloc_coherent(&pdev->dev, sizeof(*dev->dsr),
|
|
&dev->dsrbase, GFP_KERNEL);
|
|
if (!dev->dsr) {
|
|
dev_err(&pdev->dev, "failed to allocate shared region\n");
|
|
ret = -ENOMEM;
|
|
goto err_uar_unmap;
|
|
}
|
|
|
|
/* Setup the shared region */
|
|
dev->dsr->driver_version = PVRDMA_VERSION;
|
|
dev->dsr->gos_info.gos_bits = sizeof(void *) == 4 ?
|
|
PVRDMA_GOS_BITS_32 :
|
|
PVRDMA_GOS_BITS_64;
|
|
dev->dsr->gos_info.gos_type = PVRDMA_GOS_TYPE_LINUX;
|
|
dev->dsr->gos_info.gos_ver = 1;
|
|
|
|
if (dev->dsr_version < PVRDMA_PPN64_VERSION)
|
|
dev->dsr->uar_pfn = dev->driver_uar.pfn;
|
|
else
|
|
dev->dsr->uar_pfn64 = dev->driver_uar.pfn;
|
|
|
|
/* Command slot. */
|
|
dev->cmd_slot = dma_alloc_coherent(&pdev->dev, PAGE_SIZE,
|
|
&slot_dma, GFP_KERNEL);
|
|
if (!dev->cmd_slot) {
|
|
ret = -ENOMEM;
|
|
goto err_free_dsr;
|
|
}
|
|
|
|
dev->dsr->cmd_slot_dma = (u64)slot_dma;
|
|
|
|
/* Response slot. */
|
|
dev->resp_slot = dma_alloc_coherent(&pdev->dev, PAGE_SIZE,
|
|
&slot_dma, GFP_KERNEL);
|
|
if (!dev->resp_slot) {
|
|
ret = -ENOMEM;
|
|
goto err_free_slots;
|
|
}
|
|
|
|
dev->dsr->resp_slot_dma = (u64)slot_dma;
|
|
|
|
/* Async event ring */
|
|
dev->dsr->async_ring_pages.num_pages = PVRDMA_NUM_RING_PAGES;
|
|
ret = pvrdma_page_dir_init(dev, &dev->async_pdir,
|
|
dev->dsr->async_ring_pages.num_pages, true);
|
|
if (ret)
|
|
goto err_free_slots;
|
|
dev->async_ring_state = dev->async_pdir.pages[0];
|
|
dev->dsr->async_ring_pages.pdir_dma = dev->async_pdir.dir_dma;
|
|
|
|
/* CQ notification ring */
|
|
dev->dsr->cq_ring_pages.num_pages = PVRDMA_NUM_RING_PAGES;
|
|
ret = pvrdma_page_dir_init(dev, &dev->cq_pdir,
|
|
dev->dsr->cq_ring_pages.num_pages, true);
|
|
if (ret)
|
|
goto err_free_async_ring;
|
|
dev->cq_ring_state = dev->cq_pdir.pages[0];
|
|
dev->dsr->cq_ring_pages.pdir_dma = dev->cq_pdir.dir_dma;
|
|
|
|
/*
|
|
* Write the PA of the shared region to the device. The writes must be
|
|
* ordered such that the high bits are written last. When the writes
|
|
* complete, the device will have filled out the capabilities.
|
|
*/
|
|
|
|
pvrdma_write_reg(dev, PVRDMA_REG_DSRLOW, (u32)dev->dsrbase);
|
|
pvrdma_write_reg(dev, PVRDMA_REG_DSRHIGH,
|
|
(u32)((u64)(dev->dsrbase) >> 32));
|
|
|
|
/* Make sure the write is complete before reading status. */
|
|
mb();
|
|
|
|
/* The driver supports RoCE V1 and V2. */
|
|
if (!PVRDMA_SUPPORTED(dev)) {
|
|
dev_err(&pdev->dev, "driver needs RoCE v1 or v2 support\n");
|
|
ret = -EFAULT;
|
|
goto err_free_cq_ring;
|
|
}
|
|
|
|
/* Paired vmxnet3 will have same bus, slot. But func will be 0 */
|
|
pdev_net = pci_get_slot(pdev->bus, PCI_DEVFN(PCI_SLOT(pdev->devfn), 0));
|
|
if (!pdev_net) {
|
|
dev_err(&pdev->dev, "failed to find paired net device\n");
|
|
ret = -ENODEV;
|
|
goto err_free_cq_ring;
|
|
}
|
|
|
|
if (pdev_net->vendor != PCI_VENDOR_ID_VMWARE ||
|
|
pdev_net->device != PCI_DEVICE_ID_VMWARE_VMXNET3) {
|
|
dev_err(&pdev->dev, "failed to find paired vmxnet3 device\n");
|
|
pci_dev_put(pdev_net);
|
|
ret = -ENODEV;
|
|
goto err_free_cq_ring;
|
|
}
|
|
|
|
dev->netdev = pci_get_drvdata(pdev_net);
|
|
pci_dev_put(pdev_net);
|
|
if (!dev->netdev) {
|
|
dev_err(&pdev->dev, "failed to get vmxnet3 device\n");
|
|
ret = -ENODEV;
|
|
goto err_free_cq_ring;
|
|
}
|
|
dev_hold(dev->netdev);
|
|
|
|
dev_info(&pdev->dev, "paired device to %s\n", dev->netdev->name);
|
|
|
|
/* Interrupt setup */
|
|
ret = pvrdma_alloc_intrs(dev);
|
|
if (ret) {
|
|
dev_err(&pdev->dev, "failed to allocate interrupts\n");
|
|
ret = -ENOMEM;
|
|
goto err_free_cq_ring;
|
|
}
|
|
|
|
/* Allocate UAR table. */
|
|
ret = pvrdma_uar_table_init(dev);
|
|
if (ret) {
|
|
dev_err(&pdev->dev, "failed to allocate UAR table\n");
|
|
ret = -ENOMEM;
|
|
goto err_free_intrs;
|
|
}
|
|
|
|
/* Allocate GID table */
|
|
dev->sgid_tbl = kcalloc(dev->dsr->caps.gid_tbl_len,
|
|
sizeof(union ib_gid), GFP_KERNEL);
|
|
if (!dev->sgid_tbl) {
|
|
ret = -ENOMEM;
|
|
goto err_free_uar_table;
|
|
}
|
|
dev_dbg(&pdev->dev, "gid table len %d\n", dev->dsr->caps.gid_tbl_len);
|
|
|
|
pvrdma_enable_intrs(dev);
|
|
|
|
/* Activate pvrdma device */
|
|
pvrdma_write_reg(dev, PVRDMA_REG_CTL, PVRDMA_DEVICE_CTL_ACTIVATE);
|
|
|
|
/* Make sure the write is complete before reading status. */
|
|
mb();
|
|
|
|
/* Check if device was successfully activated */
|
|
ret = pvrdma_read_reg(dev, PVRDMA_REG_ERR);
|
|
if (ret != 0) {
|
|
dev_err(&pdev->dev, "failed to activate device\n");
|
|
ret = -EFAULT;
|
|
goto err_disable_intr;
|
|
}
|
|
|
|
/* Register IB device */
|
|
ret = pvrdma_register_device(dev);
|
|
if (ret) {
|
|
dev_err(&pdev->dev, "failed to register IB device\n");
|
|
goto err_disable_intr;
|
|
}
|
|
|
|
dev->nb_netdev.notifier_call = pvrdma_netdevice_event;
|
|
ret = register_netdevice_notifier(&dev->nb_netdev);
|
|
if (ret) {
|
|
dev_err(&pdev->dev, "failed to register netdevice events\n");
|
|
goto err_unreg_ibdev;
|
|
}
|
|
|
|
dev_info(&pdev->dev, "attached to device\n");
|
|
return 0;
|
|
|
|
err_unreg_ibdev:
|
|
ib_unregister_device(&dev->ib_dev);
|
|
err_disable_intr:
|
|
pvrdma_disable_intrs(dev);
|
|
kfree(dev->sgid_tbl);
|
|
err_free_uar_table:
|
|
pvrdma_uar_table_cleanup(dev);
|
|
err_free_intrs:
|
|
pvrdma_free_irq(dev);
|
|
pci_free_irq_vectors(pdev);
|
|
err_free_cq_ring:
|
|
if (dev->netdev) {
|
|
dev_put(dev->netdev);
|
|
dev->netdev = NULL;
|
|
}
|
|
pvrdma_page_dir_cleanup(dev, &dev->cq_pdir);
|
|
err_free_async_ring:
|
|
pvrdma_page_dir_cleanup(dev, &dev->async_pdir);
|
|
err_free_slots:
|
|
pvrdma_free_slots(dev);
|
|
err_free_dsr:
|
|
dma_free_coherent(&pdev->dev, sizeof(*dev->dsr), dev->dsr,
|
|
dev->dsrbase);
|
|
err_uar_unmap:
|
|
iounmap(dev->driver_uar.map);
|
|
err_unmap_regs:
|
|
iounmap(dev->regs);
|
|
err_free_resource:
|
|
pci_release_regions(pdev);
|
|
err_disable_pdev:
|
|
pci_disable_device(pdev);
|
|
pci_set_drvdata(pdev, NULL);
|
|
err_free_device:
|
|
mutex_lock(&pvrdma_device_list_lock);
|
|
list_del(&dev->device_link);
|
|
mutex_unlock(&pvrdma_device_list_lock);
|
|
ib_dealloc_device(&dev->ib_dev);
|
|
return ret;
|
|
}
|
|
|
|
static void pvrdma_pci_remove(struct pci_dev *pdev)
|
|
{
|
|
struct pvrdma_dev *dev = pci_get_drvdata(pdev);
|
|
|
|
if (!dev)
|
|
return;
|
|
|
|
dev_info(&pdev->dev, "detaching from device\n");
|
|
|
|
unregister_netdevice_notifier(&dev->nb_netdev);
|
|
dev->nb_netdev.notifier_call = NULL;
|
|
|
|
flush_workqueue(event_wq);
|
|
|
|
if (dev->netdev) {
|
|
dev_put(dev->netdev);
|
|
dev->netdev = NULL;
|
|
}
|
|
|
|
/* Unregister ib device */
|
|
ib_unregister_device(&dev->ib_dev);
|
|
|
|
mutex_lock(&pvrdma_device_list_lock);
|
|
list_del(&dev->device_link);
|
|
mutex_unlock(&pvrdma_device_list_lock);
|
|
|
|
pvrdma_disable_intrs(dev);
|
|
pvrdma_free_irq(dev);
|
|
pci_free_irq_vectors(pdev);
|
|
|
|
/* Deactivate pvrdma device */
|
|
pvrdma_write_reg(dev, PVRDMA_REG_CTL, PVRDMA_DEVICE_CTL_RESET);
|
|
pvrdma_page_dir_cleanup(dev, &dev->cq_pdir);
|
|
pvrdma_page_dir_cleanup(dev, &dev->async_pdir);
|
|
pvrdma_free_slots(dev);
|
|
dma_free_coherent(&pdev->dev, sizeof(*dev->dsr), dev->dsr,
|
|
dev->dsrbase);
|
|
|
|
iounmap(dev->regs);
|
|
kfree(dev->sgid_tbl);
|
|
kfree(dev->cq_tbl);
|
|
kfree(dev->srq_tbl);
|
|
kfree(dev->qp_tbl);
|
|
pvrdma_uar_table_cleanup(dev);
|
|
iounmap(dev->driver_uar.map);
|
|
|
|
ib_dealloc_device(&dev->ib_dev);
|
|
|
|
/* Free pci resources */
|
|
pci_release_regions(pdev);
|
|
pci_disable_device(pdev);
|
|
pci_set_drvdata(pdev, NULL);
|
|
}
|
|
|
|
static const struct pci_device_id pvrdma_pci_table[] = {
|
|
{ PCI_DEVICE(PCI_VENDOR_ID_VMWARE, PCI_DEVICE_ID_VMWARE_PVRDMA), },
|
|
{ 0 },
|
|
};
|
|
|
|
MODULE_DEVICE_TABLE(pci, pvrdma_pci_table);
|
|
|
|
static struct pci_driver pvrdma_driver = {
|
|
.name = DRV_NAME,
|
|
.id_table = pvrdma_pci_table,
|
|
.probe = pvrdma_pci_probe,
|
|
.remove = pvrdma_pci_remove,
|
|
};
|
|
|
|
static int __init pvrdma_init(void)
|
|
{
|
|
int err;
|
|
|
|
event_wq = alloc_ordered_workqueue("pvrdma_event_wq", WQ_MEM_RECLAIM);
|
|
if (!event_wq)
|
|
return -ENOMEM;
|
|
|
|
err = pci_register_driver(&pvrdma_driver);
|
|
if (err)
|
|
destroy_workqueue(event_wq);
|
|
|
|
return err;
|
|
}
|
|
|
|
static void __exit pvrdma_cleanup(void)
|
|
{
|
|
pci_unregister_driver(&pvrdma_driver);
|
|
|
|
destroy_workqueue(event_wq);
|
|
}
|
|
|
|
module_init(pvrdma_init);
|
|
module_exit(pvrdma_cleanup);
|
|
|
|
MODULE_AUTHOR("VMware, Inc");
|
|
MODULE_DESCRIPTION("VMware Paravirtual RDMA driver");
|
|
MODULE_LICENSE("Dual BSD/GPL");
|