7888478398
The SMSC FDC37M817 Super I/O chip has a configuration feature that lets it support special UART divisor values of 32770 and 32769 for bit rates of 230400 and 460800 bits per second respectively. Our 8250 driver core provides support for these special divisors via the UPF_MAGIC_MULTIPLIER flag, and YAMON firmware unconditionally configures the Super I/O chip with these divisors enabled as well, so all we need to do in platform setup for these bit rates to work is to set the flag. Signed-off-by: Maciej W. Rozycki <macro@orcam.me.uk> Link: https://lore.kernel.org/r/alpine.DEB.2.21.2105182249380.3032@angie.orcam.me.uk Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
77 lines
2.0 KiB
C
77 lines
2.0 KiB
C
/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 2006, 07 MIPS Technologies, Inc.
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* written by Ralf Baechle (ralf@linux-mips.org)
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* written by Ralf Baechle <ralf@linux-mips.org>
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*
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* Copyright (C) 2008 Wind River Systems, Inc.
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* updated by Tiejun Chen <tiejun.chen@windriver.com>
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*
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* 1. Probe driver for the Malta's UART ports:
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*
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* o 2 ports in the SMC SuperIO
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* o 1 port in the CBUS UART, a discrete 16550 which normally is only used
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* for bringups.
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*
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* We don't use 8250_platform.c on Malta as it would result in the CBUS
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* UART becoming ttyS0.
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*
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* 2. Register RTC-CMOS platform device on Malta.
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*/
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#include <linux/init.h>
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#include <linux/serial_8250.h>
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#include <linux/irq.h>
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#include <linux/platform_device.h>
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#include <asm/mips-boards/maltaint.h>
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#define SMC_PORT(base, int) \
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{ \
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.iobase = base, \
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.irq = int, \
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.uartclk = 1843200, \
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.iotype = UPIO_PORT, \
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.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | \
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UPF_MAGIC_MULTIPLIER, \
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.regshift = 0, \
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}
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#define CBUS_UART_FLAGS (UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP)
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static struct plat_serial8250_port uart8250_data[] = {
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SMC_PORT(0x3F8, 4),
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SMC_PORT(0x2F8, 3),
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#ifndef CONFIG_MIPS_CMP
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{
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.mapbase = 0x1f000900, /* The CBUS UART */
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.irq = MIPS_CPU_IRQ_BASE + MIPSCPU_INT_MB2,
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.uartclk = 3686400, /* Twice the usual clk! */
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.iotype = UPIO_MEM32,
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.flags = CBUS_UART_FLAGS,
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.regshift = 3,
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},
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#endif
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{ },
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};
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static struct platform_device malta_uart8250_device = {
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.name = "serial8250",
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.id = PLAT8250_DEV_PLATFORM,
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.dev = {
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.platform_data = uart8250_data,
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},
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};
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static struct platform_device *malta_devices[] __initdata = {
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&malta_uart8250_device,
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};
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static int __init malta_add_devices(void)
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{
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return platform_add_devices(malta_devices, ARRAY_SIZE(malta_devices));
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}
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device_initcall(malta_add_devices);
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