a5aa8e529e
Move the xsk_tx_list and the xsk_tx_list_lock from the umem to the buffer pool. This so that we in a later commit can share the umem between multiple HW queues. There is one xsk_tx_list per device and queue id, so it should be located in the buffer pool. Signed-off-by: Magnus Karlsson <magnus.karlsson@intel.com> Signed-off-by: Daniel Borkmann <daniel@iogearbox.net> Acked-by: Björn Töpel <bjorn.topel@intel.com> Link: https://lore.kernel.org/bpf/1598603189-32145-7-git-send-email-magnus.karlsson@intel.com
159 lines
4.1 KiB
C
159 lines
4.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/* Copyright(c) 2020 Intel Corporation. */
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#ifndef XSK_BUFF_POOL_H_
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#define XSK_BUFF_POOL_H_
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#include <linux/if_xdp.h>
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#include <linux/types.h>
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#include <linux/dma-mapping.h>
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#include <net/xdp.h>
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struct xsk_buff_pool;
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struct xdp_rxq_info;
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struct xsk_queue;
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struct xdp_desc;
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struct xdp_umem;
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struct xdp_sock;
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struct device;
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struct page;
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struct xdp_buff_xsk {
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struct xdp_buff xdp;
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dma_addr_t dma;
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dma_addr_t frame_dma;
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struct xsk_buff_pool *pool;
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bool unaligned;
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u64 orig_addr;
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struct list_head free_list_node;
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};
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struct xsk_buff_pool {
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struct xsk_queue *fq;
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struct xsk_queue *cq;
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struct list_head free_list;
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dma_addr_t *dma_pages;
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struct xdp_buff_xsk *heads;
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u64 chunk_mask;
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u64 addrs_cnt;
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u32 free_list_cnt;
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u32 dma_pages_cnt;
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u32 heads_cnt;
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u32 free_heads_cnt;
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u32 headroom;
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u32 chunk_size;
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u32 frame_len;
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u16 queue_id;
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u8 cached_need_wakeup;
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bool uses_need_wakeup;
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bool dma_need_sync;
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bool unaligned;
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struct xdp_umem *umem;
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void *addrs;
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struct device *dev;
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struct net_device *netdev;
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struct list_head xsk_tx_list;
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/* Protects modifications to the xsk_tx_list */
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spinlock_t xsk_tx_list_lock;
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refcount_t users;
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struct work_struct work;
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struct xdp_buff_xsk *free_heads[];
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};
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/* AF_XDP core. */
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struct xsk_buff_pool *xp_create_and_assign_umem(struct xdp_sock *xs,
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struct xdp_umem *umem);
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int xp_assign_dev(struct xsk_buff_pool *pool, struct net_device *dev,
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u16 queue_id, u16 flags);
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void xp_destroy(struct xsk_buff_pool *pool);
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void xp_release(struct xdp_buff_xsk *xskb);
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void xp_get_pool(struct xsk_buff_pool *pool);
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void xp_put_pool(struct xsk_buff_pool *pool);
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void xp_clear_dev(struct xsk_buff_pool *pool);
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void xp_add_xsk(struct xsk_buff_pool *pool, struct xdp_sock *xs);
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void xp_del_xsk(struct xsk_buff_pool *pool, struct xdp_sock *xs);
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/* AF_XDP, and XDP core. */
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void xp_free(struct xdp_buff_xsk *xskb);
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/* AF_XDP ZC drivers, via xdp_sock_buff.h */
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void xp_set_rxq_info(struct xsk_buff_pool *pool, struct xdp_rxq_info *rxq);
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int xp_dma_map(struct xsk_buff_pool *pool, struct device *dev,
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unsigned long attrs, struct page **pages, u32 nr_pages);
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void xp_dma_unmap(struct xsk_buff_pool *pool, unsigned long attrs);
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struct xdp_buff *xp_alloc(struct xsk_buff_pool *pool);
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bool xp_can_alloc(struct xsk_buff_pool *pool, u32 count);
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void *xp_raw_get_data(struct xsk_buff_pool *pool, u64 addr);
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dma_addr_t xp_raw_get_dma(struct xsk_buff_pool *pool, u64 addr);
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static inline dma_addr_t xp_get_dma(struct xdp_buff_xsk *xskb)
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{
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return xskb->dma;
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}
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static inline dma_addr_t xp_get_frame_dma(struct xdp_buff_xsk *xskb)
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{
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return xskb->frame_dma;
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}
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void xp_dma_sync_for_cpu_slow(struct xdp_buff_xsk *xskb);
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static inline void xp_dma_sync_for_cpu(struct xdp_buff_xsk *xskb)
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{
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if (!xskb->pool->dma_need_sync)
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return;
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xp_dma_sync_for_cpu_slow(xskb);
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}
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void xp_dma_sync_for_device_slow(struct xsk_buff_pool *pool, dma_addr_t dma,
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size_t size);
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static inline void xp_dma_sync_for_device(struct xsk_buff_pool *pool,
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dma_addr_t dma, size_t size)
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{
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if (!pool->dma_need_sync)
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return;
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xp_dma_sync_for_device_slow(pool, dma, size);
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}
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/* Masks for xdp_umem_page flags.
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* The low 12-bits of the addr will be 0 since this is the page address, so we
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* can use them for flags.
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*/
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#define XSK_NEXT_PG_CONTIG_SHIFT 0
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#define XSK_NEXT_PG_CONTIG_MASK BIT_ULL(XSK_NEXT_PG_CONTIG_SHIFT)
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static inline bool xp_desc_crosses_non_contig_pg(struct xsk_buff_pool *pool,
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u64 addr, u32 len)
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{
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bool cross_pg = (addr & (PAGE_SIZE - 1)) + len > PAGE_SIZE;
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if (pool->dma_pages_cnt && cross_pg) {
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return !(pool->dma_pages[addr >> PAGE_SHIFT] &
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XSK_NEXT_PG_CONTIG_MASK);
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}
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return false;
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}
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static inline u64 xp_aligned_extract_addr(struct xsk_buff_pool *pool, u64 addr)
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{
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return addr & pool->chunk_mask;
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}
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static inline u64 xp_unaligned_extract_addr(u64 addr)
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{
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return addr & XSK_UNALIGNED_BUF_ADDR_MASK;
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}
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static inline u64 xp_unaligned_extract_offset(u64 addr)
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{
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return addr >> XSK_UNALIGNED_BUF_OFFSET_SHIFT;
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}
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static inline u64 xp_unaligned_add_offset_to_addr(u64 addr)
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{
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return xp_unaligned_extract_addr(addr) +
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xp_unaligned_extract_offset(addr);
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}
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#endif /* XSK_BUFF_POOL_H_ */
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