83eb5cfcd5
If CONFIG_PCI_MSI is not set, building with CONFIG_DW_EDMA
fails:
drivers/dma/dw-edma/dw-edma-core.c: In function dw_edma_irq_request:
drivers/dma/dw-edma/dw-edma-core.c:784:21: error: implicit declaration of function pci_irq_vector; did you mean rcu_irq_enter? [-Werror=implicit-function-declaration]
err = request_irq(pci_irq_vector(to_pci_dev(dev), 0),
^~~~~~~~~~~~~~
Reported-by: Hulk Robot <hulkci@huawei.com>
Fixes: e63d79d1ff
("dmaengine: Add Synopsys eDMA IP core driver")
Signed-off-by: YueHaibing <yuehaibing@huawei.com>
Reported-by: Randy Dunlap <rdunlap@infradead.org>
Signed-off-by: Vinod Koul <vkoul@kernel.org>
20 lines
580 B
Plaintext
20 lines
580 B
Plaintext
# SPDX-License-Identifier: GPL-2.0
|
|
|
|
config DW_EDMA
|
|
tristate "Synopsys DesignWare eDMA controller driver"
|
|
depends on PCI && PCI_MSI
|
|
select DMA_ENGINE
|
|
select DMA_VIRTUAL_CHANNELS
|
|
help
|
|
Support the Synopsys DesignWare eDMA controller, normally
|
|
implemented on endpoints SoCs.
|
|
|
|
config DW_EDMA_PCIE
|
|
tristate "Synopsys DesignWare eDMA PCIe driver"
|
|
depends on PCI && PCI_MSI
|
|
select DW_EDMA
|
|
help
|
|
Provides a glue-logic between the Synopsys DesignWare
|
|
eDMA controller and an endpoint PCIe device. This also serves
|
|
as a reference design to whom desires to use this IP.
|