linux/drivers/platform
David E. Box 8074a79fad platform/x86: intel_pmc_core: Add option to set/clear LPM mode
By default the Low Power Mode (LPM or sub-state) status registers will
latch condition status on every entry into Package C10. This is
configurable in the PMC to allow latching on any achievable sub-state. Add
a debugfs file to support this.

Also add the option to clear the status registers to 0. Clearing the status
registers before testing removes ambiguity around when the current values
were set.

The new file, latch_lpm_mode, looks like this:

	[c10] S0i2.0 S0i3.0 S0i2.1 S0i3.1 S0i3.2 clear

Signed-off-by: David E. Box <david.e.box@linux.intel.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Link: https://lore.kernel.org/r/20210417031252.3020837-8-david.e.box@linux.intel.com
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2021-04-19 10:44:28 +02:00
..
chrome chrome platform changes for 5.12 2021-02-22 09:36:23 -08:00
goldfish platform/goldfish: Convert pipe tasklet to threaded irq 2021-01-27 14:57:06 +01:00
mellanox platform/mellanox: mlxreg-hotplug: move to use request_irq by IRQF_NO_AUTOEN flag 2021-04-08 16:20:09 +02:00
mips MIPS: Loongson: Fix boot warning about hwmon_device_register() 2020-07-16 10:49:55 +02:00
olpc Platform: OLPC: Constify static struct regulator_ops 2021-02-08 16:59:21 +01:00
surface platform/surface: aggregator: move to use request_irq by IRQF_NO_AUTOEN flag 2021-04-08 16:20:09 +02:00
x86 platform/x86: intel_pmc_core: Add option to set/clear LPM mode 2021-04-19 10:44:28 +02:00
Kconfig platform: Add Surface platform directory 2020-10-27 12:51:03 +01:00
Makefile platform: Add Surface platform directory 2020-10-27 12:51:03 +01:00