Baruch Siach 829e7573c4 net: phy: marvell10g: limit soft reset to 88x3310
The MV_V2_PORT_CTRL_SWRST bit in MV_V2_PORT_CTRL is reserved on 88E2110.
Setting SWRST on 88E2110 breaks packets transfer after interface down/up
cycle.

Fixes: 8f48c2ac85ed ("net: marvell10g: soft-reset the PHY when coming out of low power")
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: David S. Miller <davem@davemloft.net>
2020-04-23 12:31:41 -07:00
..
2020-04-08 10:51:53 -07:00
2020-04-20 13:03:44 -07:00
2020-04-03 13:12:26 -07:00
2020-04-15 11:27:23 -07:00
2020-04-22 19:30:38 -07:00