Prashant Gaikwad 82ce742140 clk: tegra: Fix cdev1 and cdev2 IDs ...

Correct IDs for cdev1 and cdev2 are 94 and 93 respectively.

Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
[swarren: split into separate driver and device-tree patches]
Signed-off-by: Stephen Warren <swarren@nvidia.com>

2013-04-04 16:08:46 -06:00

..

clk-audio-sync.c

clk: tegra: add Tegra specific clocks

2013-01-28 11:19:07 -07:00

clk-divider.c

clk: tegra: add Tegra specific clocks

2013-01-28 11:19:07 -07:00

clk-periph-gate.c

clk: tegra: Fix periph_clk_to_bit macro

2013-04-04 16:08:27 -06:00

clk-periph.c

clk: tegra: Export peripheral reset functions

2013-04-04 16:08:31 -06:00

clk-pll-out.c

clk: tegra: add Tegra specific clocks

2013-01-28 11:19:07 -07:00

clk-pll.c

clk: tegra: add Tegra specific clocks

2013-01-28 11:19:07 -07:00

clk-super.c

clk: tegra: Implement locking for super clock

2013-02-12 10:29:12 -07:00

clk-tegra20.c

clk: tegra: Fix cdev1 and cdev2 IDs

2013-04-04 16:08:46 -06:00

clk-tegra30.c

clk: tegra: Fix cdev1 and cdev2 IDs

2013-04-04 16:08:46 -06:00

clk.c

ARM: tegra: migrate to new clock code

2013-01-28 11:19:07 -07:00

clk.h

clk: add table lookup to mux

2013-03-22 15:18:18 -07:00

Makefile

clk: tegra: add clock support for Tegra30

2013-01-28 11:19:07 -07:00