8371b8a332
Three 32-bit registers are used to drive the thermal IP: control0, control1 and status. The two control registers share the same name both in the documentation and in the code, while the latter is referred as "sensor" in the code. Rename this pointer to be called "status" in order to be aligned with the documentation. Signed-off-by: Miquel Raynal <miquel.raynal@free-electrons.com> Reviewed-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
351 lines
8.7 KiB
C
351 lines
8.7 KiB
C
/*
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* Marvell Armada 370/XP thermal sensor driver
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*
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* Copyright (C) 2013 Marvell
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*
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* This software is licensed under the terms of the GNU General Public
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* License version 2, as published by the Free Software Foundation, and
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* may be copied, distributed, and modified under those terms.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#include <linux/device.h>
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#include <linux/err.h>
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#include <linux/io.h>
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#include <linux/kernel.h>
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#include <linux/of.h>
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#include <linux/module.h>
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#include <linux/delay.h>
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#include <linux/platform_device.h>
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#include <linux/of_device.h>
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#include <linux/thermal.h>
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/* Thermal Manager Control and Status Register */
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#define PMU_TDC0_SW_RST_MASK (0x1 << 1)
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#define PMU_TM_DISABLE_OFFS 0
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#define PMU_TM_DISABLE_MASK (0x1 << PMU_TM_DISABLE_OFFS)
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#define PMU_TDC0_REF_CAL_CNT_OFFS 11
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#define PMU_TDC0_REF_CAL_CNT_MASK (0x1ff << PMU_TDC0_REF_CAL_CNT_OFFS)
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#define PMU_TDC0_OTF_CAL_MASK (0x1 << 30)
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#define PMU_TDC0_START_CAL_MASK (0x1 << 25)
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#define A375_UNIT_CONTROL_SHIFT 27
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#define A375_UNIT_CONTROL_MASK 0x7
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#define A375_READOUT_INVERT BIT(15)
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#define A375_HW_RESETn BIT(8)
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#define A380_HW_RESET BIT(8)
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/* Legacy bindings */
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#define LEGACY_CONTROL_MEM_LEN 0x4
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/* Current bindings with the 2 control registers under the same memory area */
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#define LEGACY_CONTROL1_OFFSET 0x0
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#define CONTROL0_OFFSET 0x0
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#define CONTROL1_OFFSET 0x4
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struct armada_thermal_data;
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/* Marvell EBU Thermal Sensor Dev Structure */
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struct armada_thermal_priv {
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void __iomem *status;
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void __iomem *control0;
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void __iomem *control1;
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struct armada_thermal_data *data;
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};
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struct armada_thermal_data {
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/* Initialize the sensor */
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void (*init_sensor)(struct platform_device *pdev,
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struct armada_thermal_priv *);
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/* Test for a valid sensor value (optional) */
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bool (*is_valid)(struct armada_thermal_priv *);
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/* Formula coeficients: temp = (b - m * reg) / div */
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unsigned long coef_b;
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unsigned long coef_m;
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unsigned long coef_div;
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bool inverted;
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/* Register shift and mask to access the sensor temperature */
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unsigned int temp_shift;
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unsigned int temp_mask;
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u32 is_valid_bit;
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bool needs_control0;
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};
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static void armadaxp_init_sensor(struct platform_device *pdev,
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struct armada_thermal_priv *priv)
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{
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u32 reg;
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reg = readl_relaxed(priv->control1);
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reg |= PMU_TDC0_OTF_CAL_MASK;
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writel(reg, priv->control1);
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/* Reference calibration value */
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reg &= ~PMU_TDC0_REF_CAL_CNT_MASK;
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reg |= (0xf1 << PMU_TDC0_REF_CAL_CNT_OFFS);
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writel(reg, priv->control1);
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/* Reset the sensor */
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reg = readl_relaxed(priv->control1);
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writel((reg | PMU_TDC0_SW_RST_MASK), priv->control1);
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writel(reg, priv->control1);
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/* Enable the sensor */
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reg = readl_relaxed(priv->status);
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reg &= ~PMU_TM_DISABLE_MASK;
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writel(reg, priv->status);
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}
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static void armada370_init_sensor(struct platform_device *pdev,
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struct armada_thermal_priv *priv)
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{
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u32 reg;
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reg = readl_relaxed(priv->control1);
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reg |= PMU_TDC0_OTF_CAL_MASK;
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writel(reg, priv->control1);
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/* Reference calibration value */
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reg &= ~PMU_TDC0_REF_CAL_CNT_MASK;
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reg |= (0xf1 << PMU_TDC0_REF_CAL_CNT_OFFS);
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writel(reg, priv->control1);
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reg &= ~PMU_TDC0_START_CAL_MASK;
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writel(reg, priv->control1);
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msleep(10);
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}
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static void armada375_init_sensor(struct platform_device *pdev,
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struct armada_thermal_priv *priv)
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{
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u32 reg;
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reg = readl(priv->control1);
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reg &= ~(A375_UNIT_CONTROL_MASK << A375_UNIT_CONTROL_SHIFT);
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reg &= ~A375_READOUT_INVERT;
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reg &= ~A375_HW_RESETn;
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writel(reg, priv->control1);
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msleep(20);
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reg |= A375_HW_RESETn;
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writel(reg, priv->control1);
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msleep(50);
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}
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static void armada380_init_sensor(struct platform_device *pdev,
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struct armada_thermal_priv *priv)
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{
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u32 reg = readl_relaxed(priv->control1);
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/* Reset hardware once */
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if (!(reg & A380_HW_RESET)) {
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reg |= A380_HW_RESET;
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writel(reg, priv->control1);
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msleep(10);
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}
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}
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static bool armada_is_valid(struct armada_thermal_priv *priv)
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{
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u32 reg = readl_relaxed(priv->status);
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return reg & priv->data->is_valid_bit;
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}
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static int armada_get_temp(struct thermal_zone_device *thermal,
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int *temp)
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{
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struct armada_thermal_priv *priv = thermal->devdata;
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unsigned long reg;
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unsigned long m, b, div;
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/* Valid check */
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if (priv->data->is_valid && !priv->data->is_valid(priv)) {
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dev_err(&thermal->device,
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"Temperature sensor reading not valid\n");
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return -EIO;
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}
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reg = readl_relaxed(priv->status);
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reg = (reg >> priv->data->temp_shift) & priv->data->temp_mask;
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/* Get formula coeficients */
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b = priv->data->coef_b;
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m = priv->data->coef_m;
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div = priv->data->coef_div;
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if (priv->data->inverted)
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*temp = ((m * reg) - b) / div;
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else
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*temp = (b - (m * reg)) / div;
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return 0;
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}
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static struct thermal_zone_device_ops ops = {
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.get_temp = armada_get_temp,
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};
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static const struct armada_thermal_data armadaxp_data = {
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.init_sensor = armadaxp_init_sensor,
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.temp_shift = 10,
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.temp_mask = 0x1ff,
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.coef_b = 3153000000UL,
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.coef_m = 10000000UL,
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.coef_div = 13825,
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};
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static const struct armada_thermal_data armada370_data = {
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.is_valid = armada_is_valid,
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.init_sensor = armada370_init_sensor,
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.is_valid_bit = BIT(9),
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.temp_shift = 10,
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.temp_mask = 0x1ff,
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.coef_b = 3153000000UL,
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.coef_m = 10000000UL,
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.coef_div = 13825,
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};
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static const struct armada_thermal_data armada375_data = {
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.is_valid = armada_is_valid,
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.init_sensor = armada375_init_sensor,
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.is_valid_bit = BIT(10),
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.temp_shift = 0,
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.temp_mask = 0x1ff,
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.coef_b = 3171900000UL,
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.coef_m = 10000000UL,
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.coef_div = 13616,
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.needs_control0 = true,
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};
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static const struct armada_thermal_data armada380_data = {
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.is_valid = armada_is_valid,
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.init_sensor = armada380_init_sensor,
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.is_valid_bit = BIT(10),
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.temp_shift = 0,
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.temp_mask = 0x3ff,
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.coef_b = 1172499100UL,
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.coef_m = 2000096UL,
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.coef_div = 4201,
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.inverted = true,
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};
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static const struct of_device_id armada_thermal_id_table[] = {
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{
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.compatible = "marvell,armadaxp-thermal",
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.data = &armadaxp_data,
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},
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{
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.compatible = "marvell,armada370-thermal",
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.data = &armada370_data,
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},
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{
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.compatible = "marvell,armada375-thermal",
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.data = &armada375_data,
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},
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{
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.compatible = "marvell,armada380-thermal",
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.data = &armada380_data,
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},
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{
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/* sentinel */
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},
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};
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MODULE_DEVICE_TABLE(of, armada_thermal_id_table);
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static int armada_thermal_probe(struct platform_device *pdev)
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{
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void __iomem *control = NULL;
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struct thermal_zone_device *thermal;
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const struct of_device_id *match;
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struct armada_thermal_priv *priv;
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struct resource *res;
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match = of_match_device(armada_thermal_id_table, &pdev->dev);
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if (!match)
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return -ENODEV;
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priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
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if (!priv)
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return -ENOMEM;
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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priv->status = devm_ioremap_resource(&pdev->dev, res);
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if (IS_ERR(priv->status))
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return PTR_ERR(priv->status);
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res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
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control = devm_ioremap_resource(&pdev->dev, res);
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if (IS_ERR(control))
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return PTR_ERR(control);
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priv->data = (struct armada_thermal_data *)match->data;
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/*
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* Legacy DT bindings only described "control1" register (also referred
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* as "control MSB" on old documentation). New bindings cover
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* "control0/control LSB" and "control1/control MSB" registers within
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* the same resource, which is then of size 8 instead of 4.
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*/
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if (resource_size(res) == LEGACY_CONTROL_MEM_LEN) {
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/* ->control0 unavailable in this configuration */
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if (priv->data->needs_control0) {
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dev_err(&pdev->dev, "No access to control0 register\n");
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return -EINVAL;
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}
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priv->control1 = control + LEGACY_CONTROL1_OFFSET;
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} else {
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priv->control0 = control + CONTROL0_OFFSET;
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priv->control1 = control + CONTROL1_OFFSET;
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}
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priv->data->init_sensor(pdev, priv);
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thermal = thermal_zone_device_register("armada_thermal", 0, 0,
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priv, &ops, NULL, 0, 0);
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if (IS_ERR(thermal)) {
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dev_err(&pdev->dev,
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"Failed to register thermal zone device\n");
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return PTR_ERR(thermal);
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}
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platform_set_drvdata(pdev, thermal);
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return 0;
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}
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static int armada_thermal_exit(struct platform_device *pdev)
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{
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struct thermal_zone_device *armada_thermal =
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platform_get_drvdata(pdev);
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thermal_zone_device_unregister(armada_thermal);
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return 0;
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}
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static struct platform_driver armada_thermal_driver = {
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.probe = armada_thermal_probe,
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.remove = armada_thermal_exit,
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.driver = {
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.name = "armada_thermal",
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.of_match_table = armada_thermal_id_table,
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},
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};
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module_platform_driver(armada_thermal_driver);
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MODULE_AUTHOR("Ezequiel Garcia <ezequiel.garcia@free-electrons.com>");
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MODULE_DESCRIPTION("Armada 370/XP thermal driver");
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MODULE_LICENSE("GPL v2");
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