2f3fbfdaf7
As usual, there are many patches addressing minor issues in existing
DTS files, such as DTC warnings, or adding support for additional
peripherals.
There are three added SoCs in existing product families:
- Amazon:
Alpine v3 is a 16-core Cortex-A72 SoC from Amazon's Annapurna Labs,
otherwise known as AL73400 or first-generation Graviton, and following
the already supported Cortex-A1`5 and Cortex-A57 based Alpine chips.
This one is added together with the official Evaluation platform.
- Qualcomm:
The Snapdragon SDM630 platform is a family of mid-range mobile phone
chips from 2017 based on Cortex-A53 or Kryo 260 CPUs.
A total of five end-user products are added based on these, all
Android phones from Sony: Xperia 10, 10 Plus, XA2, XA2 Plus and
XA2 Ultra.
- Renesas:
RZ/G2H (r8a774e1) is currently the top model in the Renesas RZ/G
family, and apparently closely related to the RZ/G2N and RZ/G2M
models we already support but has a faster GPU and additional
on-chip peripherals.
It is added along with the HopeRun HiHope RZ/G2H development board
A small number of new boards for already supported SoCs also debut:
- Allwinner sunxi:
Only one new machine, revision v1.2 of the Pine64 PinePhone
(non-Android) smartphone, containing minor changes compared to
earlier versions.
- Amlogic Meson:
WeTek Core2 is an Amlogic S912 (GXM) based Set-top-box
- Aspeed:
EthanolX is AMD's EPYC data center rerence platform, using an
ASpeed AST2600 baseboard management controller.
- Mediatek:
Lenovo IdeaPad Duet 10.1" (kukui/krane) is a new Chromebook
based on the MT8183 (Helio P60t) SoC.
- Nvidia Tegra:
ASUS Google Nexus 7 and Acer Iconia Tab A500 are two Android
tablets from around 2012 using Tegra 3 and Tegra 2, respectively.
Thanks to PostmarketOS, these can now run mainline kernels
and become useful again.
The Jetson Xavier NX Developer Kit uses a SoM and carrier board
for the Tegra194, their latest 64-bit chip based on Carmel CPU
cores and Volta graphics.
- NXP i.MX:
Five new boards based on the 32-bit i.MX6 series are added:
The MYiR MYS-6ULX single-board computer, and four different
models of industrial computers from Protonic.
- Qualcomm:
MikroTik RouterBoard 3011 is a rackmounted router based on the
32-bit IPQ8064 networking SoC
Three older phones get added, the Snapdragon 808 (msm8992) based
Xiaomi Libra (Mi 4C) and Microsoft Lumia 950, originally running
Windows Phone, and the Snapdragon 810 (msm8994) based Sony
Xperia Z5.
- Renesas:
In addition to the HiHope RZ/G2H board mentioned above, we gain
support for board versions 3.0 and 4.0 of the earlier RZ/G2M and
RZ/G2N reference boards.
Beacon EmbeddedWorks adds another SoM+Carrier development board
for RZ/G2M.
- Rockchips:
Radxa Rock Pi N8 development board and the VMARC RK3288 SoM it
is based on, using the high-end 32-bit rk3288 SoC.
Notable updates to existing platforms are usually for added on-chip
peripherals, including:
- ASpeed AST2xxx (various)
- Allwinner (cpufreq, thermal, Pinephone touchscreen)
- Amlogic Meson (audio, gpu dvdfs, board updates)
- Arm Versatile
- Broadcom (board updates for switch ports, Raspberry pi clock updates)
- Hisilicon (various)
- Intel/Altera SoCFPGA (various)
- Marvell Armada 7xxx/8xxx (smmu)
- Marvell MMP (GPU on mmp2/mmp3)
- Mediatek mt8183 (USB, pericfg)
- NXP Layerscape (VPU, thermal, DSPI)
- NXP i.MX (VPU, bindings, board updates)
- Nvidia Tegra194 (GPU)
- Qualcomm (GPU, Interconnect, ...)
- Renesas R-Car (SPI, IPMMU, board updates)
- STMicroelectronics STM32 (various)
- Samsung Exynos (various)
- Socionext Uniphier (updates to serial, and pcie)
- TI K3 (serdes, usb3, audio, sd, chipid)
- TI OMAP (IPU/DSP remoteproc changes, dropping platform data)
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Cqe853h976Xm74Fr7Hci4OCo9wxGrNLXFgNkNrYzR9ud76eEcSTQX8Jj9slZvLVu
fEzNOK4VD0cIDRkw5xNZfGHGUSN7ttOV+NClVSA2zBiKv8jNivRI24+vvc+f92yb
d5P7+aeex19xSOiMmuuj5yBbU+85pbR5aoRRS5Ohe5mVL5wW9LQTs7Otsk989FBe
jOCthKfPFtxTTYMrWmM3P0DcHku/MNAsRQKUysrJlMcSefXOgkfMuN6cw4xypXAS
OvFNnIp8cigt8MLWIyU2AiLkkr3FpEsZQliy4XTBl1n6mGlRHB5wD8i294cLtQlJ
EO5yu3I3UimIyG7i4aWCy0sJMYedDrnoYisQk00aDbzea7quSuXC9yo9IompdBsr
Fqn5D7tFnVs79v/2zDhqlMU8GmFSoqPyfPSE3dgLCOHlMdd2ToD9I4ahtsJVZTjk
1Ro9TMFK+b5LIQot1inOPff0aurpZPLA7wmxUfez51IwG4UdVsmtawwPCl6OrgYm
TttK+J1yuCMSxds7QC3rPfiubc+RLEy+IQxP1tR55THg72RDWRnwXTXb5AvAu/vx
GbY1AzGszdr1+mR04CKbFyICG0l0vlyuX9qSsknRW48MaYgn8GQ=
=Tpj3
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Merge tag 'arm-dt-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM SoC DT updates from Arnd Bergmann:
"As usual, there are many patches addressing minor issues in existing
DTS files, such as DTC warnings, or adding support for additional
peripherals.
There are three added SoCs in existing product families:
- Amazon:
Alpine v3 is a 16-core Cortex-A72 SoC from Amazon's Annapurna Labs,
otherwise known as AL73400 or first-generation Graviton, and
following the already supported Cortex-A1`5 and Cortex-A57 based
Alpine chips. This one is added together with the official
Evaluation platform.
- Qualcomm:
The Snapdragon SDM630 platform is a family of mid-range mobile
phone chips from 2017 based on Cortex-A53 or Kryo 260 CPUs. A total
of five end-user products are added based on these, all Android
phones from Sony: Xperia 10, 10 Plus, XA2, XA2 Plus and XA2 Ultra.
- Renesas:
RZ/G2H (r8a774e1) is currently the top model in the Renesas RZ/G
family, and apparently closely related to the RZ/G2N and RZ/G2M
models we already support but has a faster GPU and additional
on-chip peripherals. It is added along with the HopeRun HiHope
RZ/G2H development board
A small number of new boards for already supported SoCs also debut:
- Allwinner sunxi:
Only one new machine, revision v1.2 of the Pine64 PinePhone
(non-Android) smartphone, containing minor changes compared to
earlier versions.
- Amlogic Meson:
WeTek Core2 is an Amlogic S912 (GXM) based Set-top-box
- Aspeed:
EthanolX is AMD's EPYC data center rerence platform, using an
ASpeed AST2600 baseboard management controller.
- Mediatek:
Lenovo IdeaPad Duet 10.1" (kukui/krane) is a new Chromebook based
on the MT8183 (Helio P60t) SoC.
- Nvidia Tegra:
ASUS Google Nexus 7 and Acer Iconia Tab A500 are two Android
tablets from around 2012 using Tegra 3 and Tegra 2, respectively.
Thanks to PostmarketOS, these can now run mainline kernels and
become useful again.
The Jetson Xavier NX Developer Kit uses a SoM and carrier board for
the Tegra194, their latest 64-bit chip based on Carmel CPU cores
and Volta graphics.
- NXP i.MX:
Five new boards based on the 32-bit i.MX6 series are added: The
MYiR MYS-6ULX single-board computer, and four different models of
industrial computers from Protonic.
- Qualcomm:
MikroTik RouterBoard 3011 is a rackmounted router based on the
32-bit IPQ8064 networking SoC
Three older phones get added, the Snapdragon 808 (msm8992) based
Xiaomi Libra (Mi 4C) and Microsoft Lumia 950, originally running
Windows Phone, and the Snapdragon 810 (msm8994) based Sony Xperia
Z5.
- Renesas:
In addition to the HiHope RZ/G2H board mentioned above, we gain
support for board versions 3.0 and 4.0 of the earlier RZ/G2M and
RZ/G2N reference boards. Beacon EmbeddedWorks adds another
SoM+Carrier development board for RZ/G2M.
- Rockchips:
Radxa Rock Pi N8 development board and the VMARC RK3288 SoM it is
based on, using the high-end 32-bit rk3288 SoC.
Notable updates to existing platforms are usually for added on-chip
peripherals, including:
- ASpeed AST2xxx (various)
- Allwinner (cpufreq, thermal, Pinephone touchscreen)
- Amlogic Meson (audio, gpu dvdfs, board updates)
- Arm Versatile
- Broadcom (board updates for switch ports, Raspberry pi clock updates)
- Hisilicon (various)
- Intel/Altera SoCFPGA (various)
- Marvell Armada 7xxx/8xxx (smmu)
- Marvell MMP (GPU on mmp2/mmp3)
- Mediatek mt8183 (USB, pericfg)
- NXP Layerscape (VPU, thermal, DSPI)
- NXP i.MX (VPU, bindings, board updates)
- Nvidia Tegra194 (GPU)
- Qualcomm (GPU, Interconnect, ...)
- Renesas R-Car (SPI, IPMMU, board updates)
- STMicroelectronics STM32 (various)
- Samsung Exynos (various)
- Socionext Uniphier (updates to serial, and pcie)
- TI K3 (serdes, usb3, audio, sd, chipid)
- TI OMAP (IPU/DSP remoteproc changes, dropping platform data)"
* tag 'arm-dt-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (605 commits)
arm64: dts: meson: odroid-n2: add jack audio output support
arm64: dts: meson: odroid-n2: enable audio loopback
ARM: dts: berlin: Align L2 cache-controller nodename with dtschema
arm64: dts: qcom: Add Microsoft Lumia 950 (Talkman) device tree
arm64: dts: qcom: Add Xiaomi Libra (Mi 4C) device tree
arm64: dts: qcom: msm8992: Add RPMCC node
arm64: dts: qcom: msm8992: Add PSCI support.
arm64: dts: qcom: msm8992: Add PMU node
arm64: dts: qcom: msm8992: Add BLSP2_UART2 and I2C nodes
arm64: dts: qcom: msm8992: Add SPMI PMIC arbiter device
arm64: dts: qcom: msm8992: Add a SCM node
arm64: dts: qcom: msm8992: Add a proper CPU map
arm64: dts: qcom: bullhead: Move UART pinctrl to SoC
arm64: dts: qcom: bullhead: Add qcom,msm-id
arm64: dts: qcom: msm8992: Fix SDHCI1
arm64: dts: qcom: msm8992: Modernize the DTS style
arm64: dts: qcom: Add support for Sony Xperia Z5 (SoMC Sumire-RoW)
arm64: dts: qcom: Move msm8994-smd-rpm contents to lg-bullhead.
arm64: dts: qcom: msm8994: Add support for SMD RPM
arm64: dts: qcom: msm8992: Add a label to rpm-requests
...
697 lines
16 KiB
Plaintext
697 lines
16 KiB
Plaintext
/*
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|
* Copyright 2014 Gateworks Corporation
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*
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* This file is dual-licensed: you can use it either under the terms
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* of the GPL or the X11 license, at your option. Note that this dual
|
|
* licensing only applies to this file, and not this project as a
|
|
* whole.
|
|
*
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|
* a) This file is free software; you can redistribute it and/or
|
|
* modify it under the terms of the GNU General Public License as
|
|
* published by the Free Software Foundation; either version 2 of
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|
* the License, or (at your option) any later version.
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*
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|
* This file is distributed in the hope that it will be useful,
|
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
* GNU General Public License for more details.
|
|
*
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|
* You should have received a copy of the GNU General Public
|
|
* License along with this file; if not, write to the Free
|
|
* Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
|
|
* MA 02110-1301 USA
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*
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|
* Or, alternatively,
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*
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* b) Permission is hereby granted, free of charge, to any person
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* obtaining a copy of this software and associated documentation
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|
* files (the "Software"), to deal in the Software without
|
|
* restriction, including without limitation the rights to use,
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* copy, modify, merge, publish, distribute, sublicense, and/or
|
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* sell copies of the Software, and to permit persons to whom the
|
|
* Software is furnished to do so, subject to the following
|
|
* conditions:
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*
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|
* The above copyright notice and this permission notice shall be
|
|
* included in all copies or substantial portions of the Software.
|
|
*
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|
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
|
|
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
|
|
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
|
|
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
|
|
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
|
|
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
|
* OTHER DEALINGS IN THE SOFTWARE.
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*/
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/media/tda1997x.h>
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#include <dt-bindings/input/linux-event-codes.h>
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#include <dt-bindings/sound/fsl-imx-audmux.h>
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/ {
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/* these are used by bootloader for disabling nodes */
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aliases {
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led0 = &led0;
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nand = &gpmi;
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ssi0 = &ssi1;
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usb0 = &usbh1;
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usb1 = &usbotg;
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};
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chosen {
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bootargs = "console=ttymxc1,115200";
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};
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gpio-keys {
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compatible = "gpio-keys";
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#address-cells = <1>;
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#size-cells = <0>;
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user-pb {
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label = "user_pb";
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gpios = <&gsc_gpio 0 GPIO_ACTIVE_LOW>;
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linux,code = <BTN_0>;
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};
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user-pb1x {
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label = "user_pb1x";
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linux,code = <BTN_1>;
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interrupt-parent = <&gsc>;
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interrupts = <0>;
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};
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key-erased {
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label = "key-erased";
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linux,code = <BTN_2>;
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interrupt-parent = <&gsc>;
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interrupts = <1>;
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};
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eeprom-wp {
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label = "eeprom_wp";
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linux,code = <BTN_3>;
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interrupt-parent = <&gsc>;
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interrupts = <2>;
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};
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tamper {
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label = "tamper";
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linux,code = <BTN_4>;
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interrupt-parent = <&gsc>;
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interrupts = <5>;
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};
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switch-hold {
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label = "switch_hold";
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linux,code = <BTN_5>;
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interrupt-parent = <&gsc>;
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interrupts = <7>;
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};
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};
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leds {
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compatible = "gpio-leds";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_gpio_leds>;
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led0: user1 {
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label = "user1";
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gpios = <&gpio4 7 GPIO_ACTIVE_LOW>;
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default-state = "on";
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linux,default-trigger = "heartbeat";
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};
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};
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memory@10000000 {
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device_type = "memory";
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reg = <0x10000000 0x20000000>;
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};
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reg_5p0v: regulator-5p0v {
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compatible = "regulator-fixed";
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regulator-name = "5P0V";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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};
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reg_usb_h1_vbus: regulator-usb-h1-vbus {
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compatible = "regulator-fixed";
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regulator-name = "usb_h1_vbus";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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|
};
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reg_usb_otg_vbus: regulator-usb-otg-vbus {
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compatible = "regulator-fixed";
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regulator-name = "usb_otg_vbus";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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};
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sound-digital {
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compatible = "simple-audio-card";
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simple-audio-card,name = "tda1997x-audio";
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simple-audio-card,format = "i2s";
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simple-audio-card,bitclock-master = <&sound_codec>;
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simple-audio-card,frame-master = <&sound_codec>;
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sound_cpu: simple-audio-card,cpu {
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sound-dai = <&ssi1>;
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};
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sound_codec: simple-audio-card,codec {
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sound-dai = <&hdmi_receiver>;
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};
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};
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};
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&audmux {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_audmux>; /* AUD5<->tda1997x */
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status = "okay";
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ssi1 {
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fsl,audmux-port = <0>;
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fsl,port-config = <
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(IMX_AUDMUX_V2_PTCR_TFSDIR |
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IMX_AUDMUX_V2_PTCR_TFSEL(4+8) | /* RXFS */
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IMX_AUDMUX_V2_PTCR_TCLKDIR |
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IMX_AUDMUX_V2_PTCR_TCSEL(4+8) | /* RXC */
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IMX_AUDMUX_V2_PTCR_SYN)
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IMX_AUDMUX_V2_PDCR_RXDSEL(4)
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>;
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};
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aud5 {
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fsl,audmux-port = <4>;
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fsl,port-config = <
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IMX_AUDMUX_V2_PTCR_SYN
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IMX_AUDMUX_V2_PDCR_RXDSEL(0)>;
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};
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};
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&can1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_flexcan1>;
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status = "okay";
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};
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&gpmi {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_gpmi_nand>;
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status = "okay";
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};
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&hdmi {
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ddc-i2c-bus = <&i2c3>;
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status = "okay";
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};
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&i2c1 {
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clock-frequency = <100000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c1>;
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status = "okay";
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gsc: gsc@20 {
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compatible = "gw,gsc";
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reg = <0x20>;
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interrupt-parent = <&gpio1>;
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interrupts = <4 GPIO_ACTIVE_LOW>;
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interrupt-controller;
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#interrupt-cells = <1>;
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#size-cells = <0>;
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adc {
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compatible = "gw,gsc-adc";
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#address-cells = <1>;
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#size-cells = <0>;
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channel@0 {
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gw,mode = <0>;
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reg = <0x00>;
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label = "temp";
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};
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channel@2 {
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gw,mode = <1>;
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reg = <0x02>;
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label = "vdd_vin";
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};
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channel@5 {
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gw,mode = <1>;
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reg = <0x05>;
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label = "vdd_3p3";
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};
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channel@8 {
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gw,mode = <1>;
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reg = <0x08>;
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label = "vdd_bat";
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};
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channel@b {
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gw,mode = <1>;
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reg = <0x0b>;
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label = "vdd_5p0";
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};
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channel@e {
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|
gw,mode = <1>;
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|
reg = <0xe>;
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|
label = "vdd_arm";
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|
};
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|
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|
channel@11 {
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|
gw,mode = <1>;
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|
reg = <0x11>;
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|
label = "vdd_soc";
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|
};
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|
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|
channel@14 {
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|
gw,mode = <1>;
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|
reg = <0x14>;
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|
label = "vdd_3p0";
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|
};
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|
channel@17 {
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|
gw,mode = <1>;
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|
reg = <0x17>;
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|
label = "vdd_1p5";
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|
};
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|
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|
channel@1d {
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|
gw,mode = <1>;
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|
reg = <0x1d>;
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|
label = "vdd_1p8a";
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|
};
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|
channel@20 {
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|
gw,mode = <1>;
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|
reg = <0x20>;
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|
label = "vdd_1p0b";
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|
};
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};
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};
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gsc_gpio: gpio@23 {
|
|
compatible = "nxp,pca9555";
|
|
reg = <0x23>;
|
|
gpio-controller;
|
|
#gpio-cells = <2>;
|
|
interrupt-parent = <&gsc>;
|
|
interrupts = <4>;
|
|
};
|
|
|
|
eeprom1: eeprom@50 {
|
|
compatible = "atmel,24c02";
|
|
reg = <0x50>;
|
|
pagesize = <16>;
|
|
};
|
|
|
|
eeprom2: eeprom@51 {
|
|
compatible = "atmel,24c02";
|
|
reg = <0x51>;
|
|
pagesize = <16>;
|
|
};
|
|
|
|
eeprom3: eeprom@52 {
|
|
compatible = "atmel,24c02";
|
|
reg = <0x52>;
|
|
pagesize = <16>;
|
|
};
|
|
|
|
eeprom4: eeprom@53 {
|
|
compatible = "atmel,24c02";
|
|
reg = <0x53>;
|
|
pagesize = <16>;
|
|
};
|
|
|
|
rtc: ds1672@68 {
|
|
compatible = "dallas,ds1672";
|
|
reg = <0x68>;
|
|
};
|
|
};
|
|
|
|
&i2c2 {
|
|
clock-frequency = <100000>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_i2c2>;
|
|
status = "okay";
|
|
|
|
ltc3676: pmic@3c {
|
|
compatible = "lltc,ltc3676";
|
|
reg = <0x3c>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_pmic>;
|
|
interrupt-parent = <&gpio1>;
|
|
interrupts = <8 IRQ_TYPE_EDGE_FALLING>;
|
|
|
|
regulators {
|
|
/* VDD_SOC (1+R1/R2 = 1.635) */
|
|
reg_vdd_soc: sw1 {
|
|
regulator-name = "vddsoc";
|
|
regulator-min-microvolt = <674400>;
|
|
regulator-max-microvolt = <1308000>;
|
|
lltc,fb-voltage-divider = <127000 200000>;
|
|
regulator-ramp-delay = <7000>;
|
|
regulator-boot-on;
|
|
regulator-always-on;
|
|
};
|
|
|
|
/* VDD_DDR (1+R1/R2 = 2.105) */
|
|
reg_vdd_ddr: sw2 {
|
|
regulator-name = "vddddr";
|
|
regulator-min-microvolt = <868310>;
|
|
regulator-max-microvolt = <1684000>;
|
|
lltc,fb-voltage-divider = <221000 200000>;
|
|
regulator-ramp-delay = <7000>;
|
|
regulator-boot-on;
|
|
regulator-always-on;
|
|
};
|
|
|
|
/* VDD_ARM (1+R1/R2 = 1.635) */
|
|
reg_vdd_arm: sw3 {
|
|
regulator-name = "vddarm";
|
|
regulator-min-microvolt = <674400>;
|
|
regulator-max-microvolt = <1308000>;
|
|
lltc,fb-voltage-divider = <127000 200000>;
|
|
regulator-ramp-delay = <7000>;
|
|
regulator-boot-on;
|
|
regulator-always-on;
|
|
};
|
|
|
|
/* VDD_3P3 (1+R1/R2 = 1.281) */
|
|
reg_3p3: sw4 {
|
|
regulator-name = "vdd3p3";
|
|
regulator-min-microvolt = <1880000>;
|
|
regulator-max-microvolt = <3647000>;
|
|
lltc,fb-voltage-divider = <200000 56200>;
|
|
regulator-ramp-delay = <7000>;
|
|
regulator-boot-on;
|
|
regulator-always-on;
|
|
};
|
|
|
|
/* VDD_1P8a (1+R1/R2 = 2.505): HDMI In core */
|
|
reg_1p8a: ldo2 {
|
|
regulator-name = "vdd1p8a";
|
|
regulator-min-microvolt = <1816125>;
|
|
regulator-max-microvolt = <1816125>;
|
|
lltc,fb-voltage-divider = <301000 200000>;
|
|
regulator-boot-on;
|
|
regulator-always-on;
|
|
};
|
|
|
|
/* VDD_1P8b: HDMI In analog */
|
|
reg_1p8b: ldo3 {
|
|
regulator-name = "vdd1p8b";
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <1800000>;
|
|
regulator-boot-on;
|
|
};
|
|
|
|
/* VDD_HIGH (1+R1/R2 = 4.17) */
|
|
reg_3p0: ldo4 {
|
|
regulator-name = "vdd3p0";
|
|
regulator-min-microvolt = <3023250>;
|
|
regulator-max-microvolt = <3023250>;
|
|
lltc,fb-voltage-divider = <634000 200000>;
|
|
regulator-boot-on;
|
|
regulator-always-on;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
&i2c3 {
|
|
clock-frequency = <100000>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_i2c3>;
|
|
status = "okay";
|
|
|
|
gpio_exp: pca9555@24 {
|
|
compatible = "nxp,pca9555";
|
|
reg = <0x24>;
|
|
gpio-controller;
|
|
#gpio-cells = <2>;
|
|
};
|
|
|
|
hdmi_receiver: hdmi-receiver@48 {
|
|
compatible = "nxp,tda19971";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_tda1997x>;
|
|
reg = <0x48>;
|
|
interrupt-parent = <&gpio1>;
|
|
interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
|
|
DOVDD-supply = <®_3p3>;
|
|
AVDD-supply = <®_1p8b>;
|
|
DVDD-supply = <®_1p8a>;
|
|
#sound-dai-cells = <0>;
|
|
nxp,audout-format = "i2s";
|
|
nxp,audout-layout = <0>;
|
|
nxp,audout-width = <16>;
|
|
nxp,audout-mclk-fs = <128>;
|
|
/*
|
|
* The 8bpp YUV422 semi-planar mode outputs CbCr[11:4]
|
|
* and Y[11:4] across 16bits in the same cycle
|
|
* which we map to VP[15:08]<->CSI_DATA[19:12]
|
|
*/
|
|
nxp,vidout-portcfg =
|
|
/*G_Y_11_8<->VP[15:12]<->CSI_DATA[19:16]*/
|
|
< TDA1997X_VP24_V15_12 TDA1997X_G_Y_11_8 >,
|
|
/*G_Y_7_4<->VP[11:08]<->CSI_DATA[15:12]*/
|
|
< TDA1997X_VP24_V11_08 TDA1997X_G_Y_7_4 >,
|
|
/*R_CR_CBCR_11_8<->VP[07:04]<->CSI_DATA[11:08]*/
|
|
< TDA1997X_VP24_V07_04 TDA1997X_R_CR_CBCR_11_8 >,
|
|
/*R_CR_CBCR_7_4<->VP[03:00]<->CSI_DATA[07:04]*/
|
|
< TDA1997X_VP24_V03_00 TDA1997X_R_CR_CBCR_7_4 >;
|
|
|
|
port {
|
|
tda1997x_to_ipu1_csi0_mux: endpoint {
|
|
remote-endpoint = <&ipu1_csi0_mux_from_parallel_sensor>;
|
|
bus-width = <16>;
|
|
hsync-active = <1>;
|
|
vsync-active = <1>;
|
|
data-active = <1>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
&ipu1_csi0_from_ipu1_csi0_mux {
|
|
bus-width = <16>;
|
|
};
|
|
|
|
&ipu1_csi0_mux_from_parallel_sensor {
|
|
remote-endpoint = <&tda1997x_to_ipu1_csi0_mux>;
|
|
bus-width = <16>;
|
|
};
|
|
|
|
&ipu1_csi0 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_ipu1_csi0>;
|
|
};
|
|
|
|
&pcie {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_pcie>;
|
|
reset-gpio = <&gpio1 0 GPIO_ACTIVE_LOW>;
|
|
status = "okay";
|
|
};
|
|
|
|
&pwm2 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */
|
|
status = "disabled";
|
|
};
|
|
|
|
&pwm3 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */
|
|
status = "disabled";
|
|
};
|
|
|
|
&ssi1 {
|
|
status = "okay";
|
|
};
|
|
|
|
&uart2 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_uart2>;
|
|
status = "okay";
|
|
};
|
|
|
|
&uart3 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_uart3>;
|
|
status = "okay";
|
|
};
|
|
|
|
&usbotg {
|
|
vbus-supply = <®_usb_otg_vbus>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_usbotg>;
|
|
disable-over-current;
|
|
status = "okay";
|
|
};
|
|
|
|
&usbh1 {
|
|
vbus-supply = <®_usb_h1_vbus>;
|
|
status = "okay";
|
|
};
|
|
|
|
&wdog1 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_wdog>;
|
|
fsl,ext-reset-output;
|
|
};
|
|
|
|
&iomuxc {
|
|
pinctrl_audmux: audmuxgrp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_DISP0_DAT19__AUD5_RXD 0x130b0
|
|
MX6QDL_PAD_DISP0_DAT14__AUD5_RXC 0x130b0
|
|
MX6QDL_PAD_DISP0_DAT13__AUD5_RXFS 0x130b0
|
|
>;
|
|
};
|
|
|
|
pinctrl_flexcan1: flexcan1grp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b0b1
|
|
MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x1b0b1
|
|
MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x4001b0b0 /* CAN_STBY */
|
|
>;
|
|
};
|
|
|
|
pinctrl_gpio_leds: gpioledsgrp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x1b0b0
|
|
>;
|
|
};
|
|
|
|
pinctrl_gpmi_nand: gpminandgrp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
|
|
MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1
|
|
MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1
|
|
MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
|
|
MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
|
|
MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1
|
|
MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1
|
|
MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1
|
|
MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1
|
|
MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1
|
|
MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1
|
|
MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1
|
|
MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1
|
|
MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1
|
|
MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1
|
|
>;
|
|
};
|
|
|
|
pinctrl_i2c1: i2c1grp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
|
|
MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
|
|
MX6QDL_PAD_GPIO_4__GPIO1_IO04 0xb0b1
|
|
>;
|
|
};
|
|
|
|
pinctrl_i2c2: i2c2grp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
|
|
MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
|
|
>;
|
|
};
|
|
|
|
pinctrl_i2c3: i2c3grp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
|
|
MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
|
|
>;
|
|
};
|
|
|
|
pinctrl_ipu1_csi0: ipu1_csi0grp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_CSI0_DAT4__IPU1_CSI0_DATA04 0x1b0b0
|
|
MX6QDL_PAD_CSI0_DAT5__IPU1_CSI0_DATA05 0x1b0b0
|
|
MX6QDL_PAD_CSI0_DAT6__IPU1_CSI0_DATA06 0x1b0b0
|
|
MX6QDL_PAD_CSI0_DAT7__IPU1_CSI0_DATA07 0x1b0b0
|
|
MX6QDL_PAD_CSI0_DAT8__IPU1_CSI0_DATA08 0x1b0b0
|
|
MX6QDL_PAD_CSI0_DAT9__IPU1_CSI0_DATA09 0x1b0b0
|
|
MX6QDL_PAD_CSI0_DAT10__IPU1_CSI0_DATA10 0x1b0b0
|
|
MX6QDL_PAD_CSI0_DAT11__IPU1_CSI0_DATA11 0x1b0b0
|
|
MX6QDL_PAD_CSI0_DAT12__IPU1_CSI0_DATA12 0x1b0b0
|
|
MX6QDL_PAD_CSI0_DAT13__IPU1_CSI0_DATA13 0x1b0b0
|
|
MX6QDL_PAD_CSI0_DAT14__IPU1_CSI0_DATA14 0x1b0b0
|
|
MX6QDL_PAD_CSI0_DAT15__IPU1_CSI0_DATA15 0x1b0b0
|
|
MX6QDL_PAD_CSI0_DAT16__IPU1_CSI0_DATA16 0x1b0b0
|
|
MX6QDL_PAD_CSI0_DAT17__IPU1_CSI0_DATA17 0x1b0b0
|
|
MX6QDL_PAD_CSI0_DAT18__IPU1_CSI0_DATA18 0x1b0b0
|
|
MX6QDL_PAD_CSI0_DAT19__IPU1_CSI0_DATA19 0x1b0b0
|
|
MX6QDL_PAD_CSI0_MCLK__IPU1_CSI0_HSYNC 0x1b0b0
|
|
MX6QDL_PAD_CSI0_PIXCLK__IPU1_CSI0_PIXCLK 0x1b0b0
|
|
MX6QDL_PAD_CSI0_VSYNC__IPU1_CSI0_VSYNC 0x1b0b0
|
|
>;
|
|
};
|
|
|
|
pinctrl_pcie: pciegrp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b0b0 /* PCIE RST */
|
|
>;
|
|
};
|
|
|
|
pinctrl_pmic: pmicgrp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x0001b0b0 /* PMIC_IRQ# */
|
|
>;
|
|
};
|
|
|
|
pinctrl_pwm2: pwm2grp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x1b0b1
|
|
>;
|
|
};
|
|
|
|
pinctrl_pwm3: pwm3grp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1
|
|
>;
|
|
};
|
|
|
|
pinctrl_tda1997x: tda1997xgrp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_GPIO_7__GPIO1_IO07 0x1b0b0
|
|
>;
|
|
};
|
|
|
|
pinctrl_uart2: uart2grp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
|
|
MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
|
|
>;
|
|
};
|
|
|
|
pinctrl_uart3: uart3grp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
|
|
MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
|
|
>;
|
|
};
|
|
|
|
pinctrl_usbotg: usbotggrp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
|
|
>;
|
|
};
|
|
|
|
pinctrl_wdog: wdoggrp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_DISP0_DAT8__WDOG1_B 0x1b0b0
|
|
>;
|
|
};
|
|
};
|