Geert Uytterhoeven 83fab8ea62 clk: renesas: r8a7745: Fix LB clock divider ... The CLK_TYPE_GEN2_LB clock type is meant for SoCs like R-Car H2, where the LB clock divider depends on the value of the MD18 pin. On RZ/G1E, the LB clock divider is fixed to 24. Hence model the clock as a fixed factor clock instead. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>		2018-04-16 13:39:45 +02:00
..
clk-div6.c	clk: renesas: div6: Always use readl()/writel()	2018-03-21 17:34:29 +01:00
clk-div6.h	We have two changes to the core framework this time around. The first being a	2017-11-17 20:04:24 -08:00
clk-emev2.c
clk-mstp.c	clk: renesas: mstp: Always use readl()/writel()	2018-03-21 17:34:49 +01:00
clk-r8a73a4.c	clk: renesas: r8a73a4: Always use readl()/writel()	2018-03-21 17:34:51 +01:00
clk-r8a7740.c	clk: renesas: r8a7740: Always use readl()/writel()	2018-03-21 17:34:53 +01:00
clk-r8a7778.c	clk: renesas: r8a7778: Remove obsolete r8a7778_clocks_init()	2016-11-02 20:44:14 +01:00
clk-r8a7779.c	clk: renesas: r8a7779: Remove obsolete r8a7779_clocks_init()	2016-11-02 20:44:17 +01:00
clk-rcar-gen2.c	clk: renesas: rcar-gen2: Always use readl()/writel()	2018-03-21 17:34:54 +01:00
clk-rz.c	clk: renesas: rza1: Always use readl()/writel()	2018-03-21 17:34:57 +01:00
clk-sh73a0.c	clk: renesas: Updates for v4.17 (take two)	2018-03-23 09:40:52 -07:00
Kconfig	clk: renesas: cpg-mssr: Add r8a77470 support	2018-04-16 13:39:40 +02:00
Makefile	clk: renesas: cpg-mssr: Add r8a77470 support	2018-04-16 13:39:40 +02:00
r8a7743-cpg-mssr.c	clk: renesas: r8a7743: Fix LB clock divider	2018-04-16 13:39:43 +02:00
r8a7745-cpg-mssr.c	clk: renesas: r8a7745: Fix LB clock divider	2018-04-16 13:39:45 +02:00
r8a7790-cpg-mssr.c	clk: renesas: r8a7790: Add rwdt clock	2018-02-20 13:35:16 +01:00
r8a7791-cpg-mssr.c	clk: renesas: r8a7791/r8a7793: Add rwdt clock	2018-02-20 13:35:20 +01:00
r8a7792-cpg-mssr.c	clk: renesas: r8a7792: Add rwdt clock	2018-02-20 13:35:27 +01:00
r8a7794-cpg-mssr.c	clk: renesas: r8a7794: Add rwdt clock	2018-02-20 13:35:23 +01:00
r8a7795-cpg-mssr.c	clk: renesas: r8a7795: Add Z2 clock	2018-02-12 15:10:18 +01:00
r8a7796-cpg-mssr.c	clk: renesas: r8a7796: Add Z2 clock	2018-02-12 15:10:18 +01:00
r8a77470-cpg-mssr.c	clk: renesas: cpg-mssr: Add r8a77470 support	2018-04-16 13:39:40 +02:00
r8a77965-cpg-mssr.c	clk: renesas: r8a77965: Add MSIOF controller clocks	2018-04-16 13:39:36 +02:00
r8a77970-cpg-mssr.c	clk: renesas: r8a77970: Add LVDS clock	2017-12-08 13:52:45 +01:00
r8a77980-cpg-mssr.c	clk: renesas: cpg-mssr: add R8A77980 support	2018-02-20 13:39:07 +01:00
r8a77995-cpg-mssr.c	clk: renesas: r8a77995: Correct parent clock of INTC-AP	2017-10-16 09:38:39 +02:00
rcar-gen2-cpg.c	clk: renesas: cpg-mssr: Add r8a77470 support	2018-04-16 13:39:40 +02:00
rcar-gen2-cpg.h	clk: renesas: cpg-mssr: Add support to restore core clocks during resume	2017-10-20 11:15:33 +02:00
rcar-gen3-cpg.c	clk: renesas: rcar-gen3: Always use readl()/writel()	2018-03-21 17:35:00 +01:00
rcar-gen3-cpg.h	clk: renesas: rcar-gen3: Add Z2 clock divider support	2018-02-12 15:10:18 +01:00
rcar-usb2-clock-sel.c	clk: renesas: rcar-usb2-clock-sel: Add R-Car USB 2.0 clock selector PHY	2017-08-17 09:22:23 +02:00
renesas-cpg-mssr.c	clk: renesas: cpg-mssr: Add r8a77470 support	2018-04-16 13:39:40 +02:00
renesas-cpg-mssr.h	clk: renesas: cpg-mssr: Add r8a77470 support	2018-04-16 13:39:40 +02:00