Dmitry Baryshkov 858c595a3f drm/msm/dsi: add continuous clock support for 7nm PHY ...

Unlike previous generations, 7nm PHYs are required to collaborate with
the host for continuos clock mode. Add changes neccessary to enable
continuous clock mode in the 7nm DSI PHYs.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20210805170817.3337665-1-dmitry.baryshkov@linaro.org
[Fix merge conflict, and $description typo]
Signed-off-by: Rob Clark <robdclark@chromium.org>

2021-08-10 15:30:32 -07:00

..

dsi_phy_7nm.c

drm/msm/dsi: add continuous clock support for 7nm PHY

2021-08-10 15:30:32 -07:00

dsi_phy_10nm.c

drm/msm/dsi: rename dual DSI to bonded DSI

2021-08-07 11:48:39 -07:00

dsi_phy_14nm.c

drm/msm/dsi: Fix DSI and DSI PHY regulator config from SDM660

2021-08-07 11:48:40 -07:00

dsi_phy_20nm.c

drm/msm: Generated register update

2021-06-23 07:33:54 -07:00

dsi_phy_28nm_8960.c

drm/msm: Generated register update

2021-06-23 07:33:54 -07:00

dsi_phy_28nm.c

drm/msm: Generated register update

2021-06-23 07:33:54 -07:00

dsi_phy.c

drm/msm/dsi: add continuous clock support for 7nm PHY

2021-08-10 15:30:32 -07:00

dsi_phy.h

drm/msm/dsi: add continuous clock support for 7nm PHY

2021-08-10 15:30:32 -07:00