9fc792e596
Update the mx25_read_cpu_rev function to recognize silicon revision 1.2 for imx25 chipsets. Silicon revision 1.2 is mentioned in the errata document at https://www.nxp.com/docs/en/errata/IMX25CE.pdf. The imx25 chips on my test boards show revision 1.2 as well. Signed-off-by: Martin Kaiser <martin@kaiser.cx> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
50 lines
988 B
C
50 lines
988 B
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* MX25 CPU type detection
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*
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* Copyright (c) 2009 Daniel Mack <daniel@caiaq.de>
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* Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved
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*/
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#include <linux/module.h>
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#include <linux/io.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include "iim.h"
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#include "hardware.h"
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static int mx25_cpu_rev = -1;
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static int mx25_read_cpu_rev(void)
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{
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u32 rev;
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void __iomem *iim_base;
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struct device_node *np;
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np = of_find_compatible_node(NULL, NULL, "fsl,imx25-iim");
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iim_base = of_iomap(np, 0);
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BUG_ON(!iim_base);
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rev = readl(iim_base + MXC_IIMSREV);
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iounmap(iim_base);
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switch (rev) {
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case 0x00:
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return IMX_CHIP_REVISION_1_0;
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case 0x01:
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return IMX_CHIP_REVISION_1_1;
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case 0x02:
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return IMX_CHIP_REVISION_1_2;
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default:
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return IMX_CHIP_REVISION_UNKNOWN;
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}
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}
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int mx25_revision(void)
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{
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if (mx25_cpu_rev == -1)
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mx25_cpu_rev = mx25_read_cpu_rev();
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return mx25_cpu_rev;
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}
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EXPORT_SYMBOL(mx25_revision);
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