linux/arch/riscv/include
Sean Christopherson 869c706092
RISC-V: Use common riscv_cpuid_to_hartid_mask() for both SMP=y and SMP=n
Use what is currently the SMP=y version of riscv_cpuid_to_hartid_mask()
for both SMP=y and SMP=n to fix a build failure with KVM=m and SMP=n due
to boot_cpu_hartid not being exported.  This also fixes a second bug
where the SMP=n version assumes the sole CPU in the system is in the
incoming mask, which may not hold true in kvm_riscv_vcpu_sbi_ecall() if
the KVM guest VM has multiple vCPUs (on a SMP=n system).

Fixes: 1ef46c231d ("RISC-V: Implement new SBI v0.2 extensions")
Reported-by: Adam Borowski <kilobyte@angband.pl>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Signed-off-by: Sean Christopherson <seanjc@google.com>
Cc: stable@vger.kernel.org
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
2022-01-09 12:13:31 -08:00
..
asm RISC-V: Use common riscv_cpuid_to_hartid_mask() for both SMP=y and SMP=n 2022-01-09 12:13:31 -08:00
uapi/asm ARM: 2021-11-02 11:24:14 -07:00