d5c421d24d
@xilinx.com is still working but better to switch to new amd.com after AMD/Xilinx acquisition. Acked-by: Sebastian Reichel <sebastian.reichel@collabora.com> Acked-by: Wolfram Sang <wsa@kernel.org> # for I2C Acked-by: Mark Brown <broonie@kernel.org> Acked-by: Jassi Brar <jassisinghbrar@gmail.com> Acked-by: Damien Le Moal <dlemoal@kernel.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/f5b2bd1e78407e4128fc8f0b5874ba723e710a88.1684245058.git.michal.simek@amd.com
78 lines
1.6 KiB
YAML
78 lines
1.6 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/serial/cdns,uart.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Cadence UART Controller
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maintainers:
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- Michal Simek <michal.simek@amd.com>
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properties:
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compatible:
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oneOf:
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- description: UART controller for Zynq-7xxx SoC
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items:
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- const: xlnx,xuartps
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- const: cdns,uart-r1p8
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- description: UART controller for Zynq Ultrascale+ MPSoC
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items:
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- const: xlnx,zynqmp-uart
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- const: cdns,uart-r1p12
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reg:
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maxItems: 1
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interrupts:
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maxItems: 1
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clocks:
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maxItems: 2
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clock-names:
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items:
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- const: uart_clk
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- const: pclk
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cts-override:
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description: |
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Override the CTS modem status signal. This signal will
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always be reported as active instead of being obtained
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from the modem status register. Define this if your serial
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port does not use this pin.
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type: boolean
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power-domains:
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maxItems: 1
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required:
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- compatible
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- reg
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- interrupts
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- clocks
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- clock-names
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allOf:
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- $ref: serial.yaml#
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- if:
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properties:
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compatible:
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contains:
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const: cdns,uart-r1p8
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then:
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properties:
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power-domains: false
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unevaluatedProperties: false
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examples:
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- |
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uart0: serial@e0000000 {
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compatible = "xlnx,xuartps", "cdns,uart-r1p8";
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clocks = <&clkc 23>, <&clkc 40>;
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clock-names = "uart_clk", "pclk";
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reg = <0xe0000000 0x1000>;
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interrupts = <0 27 4>;
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};
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