4f9701057a
Including: - Big cleanup of almost unsused parts of the IOMMU API by Christoph Hellwig. This mostly affects the Freescale PAMU driver. - New IOMMU driver for Unisoc SOCs - ARM SMMU Updates from Will: - SMMUv3: Drop vestigial PREFETCH_ADDR support - SMMUv3: Elide TLB sync logic for empty gather - SMMUv3: Fix "Service Failure Mode" handling - SMMUv2: New Qualcomm compatible string - Removal of the AMD IOMMU performance counter writeable check on AMD. It caused long boot delays on some machines and is only needed to work around an errata on some older (possibly pre-production) chips. If someone is still hit by this hardware issue anyway the performance counters will just return 0. - Support for targeted invalidations in the AMD IOMMU driver. Before that the driver only invalidated a single 4k page or the whole IO/TLB for an address space. This has been extended now and is mostly useful for emulated AMD IOMMUs. - Several fixes for the Shared Virtual Memory support in the Intel VT-d driver - Mediatek drivers can now be built as modules - Re-introduction of the forcedac boot option which got lost when converting the Intel VT-d driver to the common dma-iommu implementation. - Extension of the IOMMU device registration interface and support iommu_ops to be const again when drivers are built as modules. -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEEr9jSbILcajRFYWYyK/BELZcBGuMFAmCMEIoACgkQK/BELZcB GuOu9xAAvg6aR0uHlxvRq6cgNnHN9Ltp5+t3qFYtRRrauY0iOPMO62k0QQli5shX CGeczD0e59KAZqI0zNJnQn8hMY5dg7XVkFCC5BrSzuCDCtwJZ0N5Tq3pfUlaV1rw BJf41t79Fd+jp7kn53tu+vRAfYZ3+sLOx/6U3c15pqKRZSkyFWbQllOtD3J5LnLu 1PyPlfiNpMwCajiS7aQbN+fuJ/lKIFeA2MDPOsCBzhbfxiJUqJxZOKAZO3rOjFfK feTibqQ+3Zz6MPXt9st1cvPpy8jCosv81OY6Knqvxf/oB5q+fEdi2uNrKISonb/t Fw331oOIwg2A+HOpwC9MN1AumOIqiHSWWENAMk9SlP+TMIWKQ8kZreyI6IEB23dV +QvP3DVA+CfLwtNY/Zh0IqKh28D+IHlKbpWNU1m+9AUe468mV/MTjfwxr9Yfffhm LZ6C0DgFdmtqv8jPuDGUOgo3RNeN8bLnUSEHG9gHibA+RKujl5BWDjKkwILqMQTt Ysdsu8TiNtFIULomizqCpgqEbQfW8TLFvASXCM1VMQ/PDURxvchZPxFDJonYXy+K z2HGaG3eUE07YrAdRKH69aMVIbmS+sjEhvmi4xZ1Lh7wWcIE2AZVvO8qNb+Ckcp3 4tLPPDksm/iQngnFf6gdgH3qv4rgbzE4+74GXqeANiQCjY9dSJI= =qF2C -----END PGP SIGNATURE----- Merge tag 'iommu-updates-v5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu Pull iommu updates from Joerg Roedel: - Big cleanup of almost unsused parts of the IOMMU API by Christoph Hellwig. This mostly affects the Freescale PAMU driver. - New IOMMU driver for Unisoc SOCs - ARM SMMU Updates from Will: - Drop vestigial PREFETCH_ADDR support (SMMUv3) - Elide TLB sync logic for empty gather (SMMUv3) - Fix "Service Failure Mode" handling (SMMUv3) - New Qualcomm compatible string (SMMUv2) - Removal of the AMD IOMMU performance counter writeable check on AMD. It caused long boot delays on some machines and is only needed to work around an errata on some older (possibly pre-production) chips. If someone is still hit by this hardware issue anyway the performance counters will just return 0. - Support for targeted invalidations in the AMD IOMMU driver. Before that the driver only invalidated a single 4k page or the whole IO/TLB for an address space. This has been extended now and is mostly useful for emulated AMD IOMMUs. - Several fixes for the Shared Virtual Memory support in the Intel VT-d driver - Mediatek drivers can now be built as modules - Re-introduction of the forcedac boot option which got lost when converting the Intel VT-d driver to the common dma-iommu implementation. - Extension of the IOMMU device registration interface and support iommu_ops to be const again when drivers are built as modules. * tag 'iommu-updates-v5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu: (84 commits) iommu: Streamline registration interface iommu: Statically set module owner iommu/mediatek-v1: Add error handle for mtk_iommu_probe iommu/mediatek-v1: Avoid build fail when build as module iommu/mediatek: Always enable the clk on resume iommu/fsl-pamu: Fix uninitialized variable warning iommu/vt-d: Force to flush iotlb before creating superpage iommu/amd: Put newline after closing bracket in warning iommu/vt-d: Fix an error handling path in 'intel_prepare_irq_remapping()' iommu/vt-d: Fix build error of pasid_enable_wpe() with !X86 iommu/amd: Remove performance counter pre-initialization test Revert "iommu/amd: Fix performance counter initialization" iommu/amd: Remove duplicate check of devid iommu/exynos: Remove unneeded local variable initialization iommu/amd: Page-specific invalidations for more than one page iommu/arm-smmu-v3: Remove the unused fields for PREFETCH_CONFIG command iommu/vt-d: Avoid unnecessary cache flush in pasid entry teardown iommu/vt-d: Invalidate PASID cache when root/context entry changed iommu/vt-d: Remove WO permissions on second-level paging entries iommu/vt-d: Report the right page fault address ...
548 lines
12 KiB
C
548 lines
12 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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#include <linux/compat.h>
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#include <linux/dma-mapping.h>
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#include <linux/iommu.h>
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#include <linux/module.h>
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#include <linux/poll.h>
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#include <linux/slab.h>
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#include <linux/uacce.h>
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static struct class *uacce_class;
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static dev_t uacce_devt;
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static DEFINE_MUTEX(uacce_mutex);
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static DEFINE_XARRAY_ALLOC(uacce_xa);
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static int uacce_start_queue(struct uacce_queue *q)
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{
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int ret = 0;
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mutex_lock(&uacce_mutex);
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if (q->state != UACCE_Q_INIT) {
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ret = -EINVAL;
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goto out_with_lock;
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}
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if (q->uacce->ops->start_queue) {
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ret = q->uacce->ops->start_queue(q);
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if (ret < 0)
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goto out_with_lock;
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}
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q->state = UACCE_Q_STARTED;
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out_with_lock:
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mutex_unlock(&uacce_mutex);
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return ret;
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}
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static int uacce_put_queue(struct uacce_queue *q)
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{
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struct uacce_device *uacce = q->uacce;
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mutex_lock(&uacce_mutex);
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if (q->state == UACCE_Q_ZOMBIE)
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goto out;
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if ((q->state == UACCE_Q_STARTED) && uacce->ops->stop_queue)
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uacce->ops->stop_queue(q);
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if ((q->state == UACCE_Q_INIT || q->state == UACCE_Q_STARTED) &&
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uacce->ops->put_queue)
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uacce->ops->put_queue(q);
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q->state = UACCE_Q_ZOMBIE;
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out:
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mutex_unlock(&uacce_mutex);
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return 0;
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}
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static long uacce_fops_unl_ioctl(struct file *filep,
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unsigned int cmd, unsigned long arg)
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{
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struct uacce_queue *q = filep->private_data;
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struct uacce_device *uacce = q->uacce;
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switch (cmd) {
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case UACCE_CMD_START_Q:
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return uacce_start_queue(q);
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case UACCE_CMD_PUT_Q:
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return uacce_put_queue(q);
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default:
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if (!uacce->ops->ioctl)
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return -EINVAL;
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return uacce->ops->ioctl(q, cmd, arg);
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}
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}
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#ifdef CONFIG_COMPAT
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static long uacce_fops_compat_ioctl(struct file *filep,
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unsigned int cmd, unsigned long arg)
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{
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arg = (unsigned long)compat_ptr(arg);
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return uacce_fops_unl_ioctl(filep, cmd, arg);
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}
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#endif
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static int uacce_bind_queue(struct uacce_device *uacce, struct uacce_queue *q)
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{
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u32 pasid;
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struct iommu_sva *handle;
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if (!(uacce->flags & UACCE_DEV_SVA))
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return 0;
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handle = iommu_sva_bind_device(uacce->parent, current->mm, NULL);
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if (IS_ERR(handle))
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return PTR_ERR(handle);
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pasid = iommu_sva_get_pasid(handle);
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if (pasid == IOMMU_PASID_INVALID) {
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iommu_sva_unbind_device(handle);
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return -ENODEV;
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}
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q->handle = handle;
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q->pasid = pasid;
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return 0;
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}
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static void uacce_unbind_queue(struct uacce_queue *q)
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{
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if (!q->handle)
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return;
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iommu_sva_unbind_device(q->handle);
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q->handle = NULL;
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}
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static int uacce_fops_open(struct inode *inode, struct file *filep)
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{
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struct uacce_device *uacce;
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struct uacce_queue *q;
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int ret;
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uacce = xa_load(&uacce_xa, iminor(inode));
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if (!uacce)
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return -ENODEV;
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q = kzalloc(sizeof(struct uacce_queue), GFP_KERNEL);
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if (!q)
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return -ENOMEM;
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ret = uacce_bind_queue(uacce, q);
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if (ret)
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goto out_with_mem;
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q->uacce = uacce;
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if (uacce->ops->get_queue) {
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ret = uacce->ops->get_queue(uacce, q->pasid, q);
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if (ret < 0)
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goto out_with_bond;
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}
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init_waitqueue_head(&q->wait);
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filep->private_data = q;
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uacce->inode = inode;
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q->state = UACCE_Q_INIT;
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mutex_lock(&uacce->queues_lock);
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list_add(&q->list, &uacce->queues);
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mutex_unlock(&uacce->queues_lock);
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return 0;
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out_with_bond:
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uacce_unbind_queue(q);
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out_with_mem:
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kfree(q);
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return ret;
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}
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static int uacce_fops_release(struct inode *inode, struct file *filep)
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{
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struct uacce_queue *q = filep->private_data;
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mutex_lock(&q->uacce->queues_lock);
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list_del(&q->list);
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mutex_unlock(&q->uacce->queues_lock);
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uacce_put_queue(q);
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uacce_unbind_queue(q);
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kfree(q);
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return 0;
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}
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static void uacce_vma_close(struct vm_area_struct *vma)
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{
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struct uacce_queue *q = vma->vm_private_data;
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struct uacce_qfile_region *qfr = NULL;
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if (vma->vm_pgoff < UACCE_MAX_REGION)
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qfr = q->qfrs[vma->vm_pgoff];
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kfree(qfr);
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}
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static const struct vm_operations_struct uacce_vm_ops = {
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.close = uacce_vma_close,
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};
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static int uacce_fops_mmap(struct file *filep, struct vm_area_struct *vma)
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{
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struct uacce_queue *q = filep->private_data;
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struct uacce_device *uacce = q->uacce;
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struct uacce_qfile_region *qfr;
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enum uacce_qfrt type = UACCE_MAX_REGION;
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int ret = 0;
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if (vma->vm_pgoff < UACCE_MAX_REGION)
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type = vma->vm_pgoff;
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else
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return -EINVAL;
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qfr = kzalloc(sizeof(*qfr), GFP_KERNEL);
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if (!qfr)
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return -ENOMEM;
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vma->vm_flags |= VM_DONTCOPY | VM_DONTEXPAND | VM_WIPEONFORK;
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vma->vm_ops = &uacce_vm_ops;
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vma->vm_private_data = q;
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qfr->type = type;
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mutex_lock(&uacce_mutex);
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if (q->state != UACCE_Q_INIT && q->state != UACCE_Q_STARTED) {
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ret = -EINVAL;
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goto out_with_lock;
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}
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if (q->qfrs[type]) {
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ret = -EEXIST;
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goto out_with_lock;
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}
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switch (type) {
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case UACCE_QFRT_MMIO:
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case UACCE_QFRT_DUS:
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if (!uacce->ops->mmap) {
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ret = -EINVAL;
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goto out_with_lock;
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}
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ret = uacce->ops->mmap(q, vma, qfr);
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if (ret)
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goto out_with_lock;
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break;
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default:
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ret = -EINVAL;
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goto out_with_lock;
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}
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q->qfrs[type] = qfr;
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mutex_unlock(&uacce_mutex);
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return ret;
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out_with_lock:
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mutex_unlock(&uacce_mutex);
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kfree(qfr);
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return ret;
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}
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static __poll_t uacce_fops_poll(struct file *file, poll_table *wait)
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{
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struct uacce_queue *q = file->private_data;
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struct uacce_device *uacce = q->uacce;
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poll_wait(file, &q->wait, wait);
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if (uacce->ops->is_q_updated && uacce->ops->is_q_updated(q))
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return EPOLLIN | EPOLLRDNORM;
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return 0;
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}
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static const struct file_operations uacce_fops = {
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.owner = THIS_MODULE,
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.open = uacce_fops_open,
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.release = uacce_fops_release,
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.unlocked_ioctl = uacce_fops_unl_ioctl,
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#ifdef CONFIG_COMPAT
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.compat_ioctl = uacce_fops_compat_ioctl,
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#endif
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.mmap = uacce_fops_mmap,
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.poll = uacce_fops_poll,
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};
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#define to_uacce_device(dev) container_of(dev, struct uacce_device, dev)
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static ssize_t api_show(struct device *dev,
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struct device_attribute *attr, char *buf)
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{
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struct uacce_device *uacce = to_uacce_device(dev);
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return sprintf(buf, "%s\n", uacce->api_ver);
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}
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static ssize_t flags_show(struct device *dev,
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struct device_attribute *attr, char *buf)
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{
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struct uacce_device *uacce = to_uacce_device(dev);
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return sprintf(buf, "%u\n", uacce->flags);
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}
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static ssize_t available_instances_show(struct device *dev,
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struct device_attribute *attr,
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char *buf)
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{
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struct uacce_device *uacce = to_uacce_device(dev);
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if (!uacce->ops->get_available_instances)
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return -ENODEV;
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return sprintf(buf, "%d\n",
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uacce->ops->get_available_instances(uacce));
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}
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static ssize_t algorithms_show(struct device *dev,
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struct device_attribute *attr, char *buf)
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{
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struct uacce_device *uacce = to_uacce_device(dev);
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return sprintf(buf, "%s\n", uacce->algs);
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}
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static ssize_t region_mmio_size_show(struct device *dev,
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struct device_attribute *attr, char *buf)
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{
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struct uacce_device *uacce = to_uacce_device(dev);
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return sprintf(buf, "%lu\n",
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uacce->qf_pg_num[UACCE_QFRT_MMIO] << PAGE_SHIFT);
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}
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static ssize_t region_dus_size_show(struct device *dev,
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struct device_attribute *attr, char *buf)
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{
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struct uacce_device *uacce = to_uacce_device(dev);
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return sprintf(buf, "%lu\n",
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uacce->qf_pg_num[UACCE_QFRT_DUS] << PAGE_SHIFT);
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}
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static DEVICE_ATTR_RO(api);
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static DEVICE_ATTR_RO(flags);
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static DEVICE_ATTR_RO(available_instances);
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static DEVICE_ATTR_RO(algorithms);
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static DEVICE_ATTR_RO(region_mmio_size);
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static DEVICE_ATTR_RO(region_dus_size);
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static struct attribute *uacce_dev_attrs[] = {
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&dev_attr_api.attr,
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&dev_attr_flags.attr,
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&dev_attr_available_instances.attr,
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&dev_attr_algorithms.attr,
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&dev_attr_region_mmio_size.attr,
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&dev_attr_region_dus_size.attr,
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NULL,
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};
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static umode_t uacce_dev_is_visible(struct kobject *kobj,
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struct attribute *attr, int n)
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{
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struct device *dev = kobj_to_dev(kobj);
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struct uacce_device *uacce = to_uacce_device(dev);
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if (((attr == &dev_attr_region_mmio_size.attr) &&
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(!uacce->qf_pg_num[UACCE_QFRT_MMIO])) ||
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((attr == &dev_attr_region_dus_size.attr) &&
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(!uacce->qf_pg_num[UACCE_QFRT_DUS])))
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return 0;
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return attr->mode;
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}
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static struct attribute_group uacce_dev_group = {
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.is_visible = uacce_dev_is_visible,
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.attrs = uacce_dev_attrs,
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};
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__ATTRIBUTE_GROUPS(uacce_dev);
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static void uacce_release(struct device *dev)
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{
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struct uacce_device *uacce = to_uacce_device(dev);
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kfree(uacce);
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}
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static unsigned int uacce_enable_sva(struct device *parent, unsigned int flags)
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{
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if (!(flags & UACCE_DEV_SVA))
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return flags;
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flags &= ~UACCE_DEV_SVA;
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if (iommu_dev_enable_feature(parent, IOMMU_DEV_FEAT_IOPF))
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return flags;
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if (iommu_dev_enable_feature(parent, IOMMU_DEV_FEAT_SVA)) {
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iommu_dev_disable_feature(parent, IOMMU_DEV_FEAT_IOPF);
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return flags;
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}
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return flags | UACCE_DEV_SVA;
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}
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static void uacce_disable_sva(struct uacce_device *uacce)
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{
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if (!(uacce->flags & UACCE_DEV_SVA))
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return;
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iommu_dev_disable_feature(uacce->parent, IOMMU_DEV_FEAT_SVA);
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iommu_dev_disable_feature(uacce->parent, IOMMU_DEV_FEAT_IOPF);
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}
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/**
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* uacce_alloc() - alloc an accelerator
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* @parent: pointer of uacce parent device
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* @interface: pointer of uacce_interface for register
|
|
*
|
|
* Returns uacce pointer if success and ERR_PTR if not
|
|
* Need check returned negotiated uacce->flags
|
|
*/
|
|
struct uacce_device *uacce_alloc(struct device *parent,
|
|
struct uacce_interface *interface)
|
|
{
|
|
unsigned int flags = interface->flags;
|
|
struct uacce_device *uacce;
|
|
int ret;
|
|
|
|
uacce = kzalloc(sizeof(struct uacce_device), GFP_KERNEL);
|
|
if (!uacce)
|
|
return ERR_PTR(-ENOMEM);
|
|
|
|
flags = uacce_enable_sva(parent, flags);
|
|
|
|
uacce->parent = parent;
|
|
uacce->flags = flags;
|
|
uacce->ops = interface->ops;
|
|
|
|
ret = xa_alloc(&uacce_xa, &uacce->dev_id, uacce, xa_limit_32b,
|
|
GFP_KERNEL);
|
|
if (ret < 0)
|
|
goto err_with_uacce;
|
|
|
|
INIT_LIST_HEAD(&uacce->queues);
|
|
mutex_init(&uacce->queues_lock);
|
|
device_initialize(&uacce->dev);
|
|
uacce->dev.devt = MKDEV(MAJOR(uacce_devt), uacce->dev_id);
|
|
uacce->dev.class = uacce_class;
|
|
uacce->dev.groups = uacce_dev_groups;
|
|
uacce->dev.parent = uacce->parent;
|
|
uacce->dev.release = uacce_release;
|
|
dev_set_name(&uacce->dev, "%s-%d", interface->name, uacce->dev_id);
|
|
|
|
return uacce;
|
|
|
|
err_with_uacce:
|
|
uacce_disable_sva(uacce);
|
|
kfree(uacce);
|
|
return ERR_PTR(ret);
|
|
}
|
|
EXPORT_SYMBOL_GPL(uacce_alloc);
|
|
|
|
/**
|
|
* uacce_register() - add the accelerator to cdev and export to user space
|
|
* @uacce: The initialized uacce device
|
|
*
|
|
* Return 0 if register succeeded, or an error.
|
|
*/
|
|
int uacce_register(struct uacce_device *uacce)
|
|
{
|
|
if (!uacce)
|
|
return -ENODEV;
|
|
|
|
uacce->cdev = cdev_alloc();
|
|
if (!uacce->cdev)
|
|
return -ENOMEM;
|
|
|
|
uacce->cdev->ops = &uacce_fops;
|
|
uacce->cdev->owner = THIS_MODULE;
|
|
|
|
return cdev_device_add(uacce->cdev, &uacce->dev);
|
|
}
|
|
EXPORT_SYMBOL_GPL(uacce_register);
|
|
|
|
/**
|
|
* uacce_remove() - remove the accelerator
|
|
* @uacce: the accelerator to remove
|
|
*/
|
|
void uacce_remove(struct uacce_device *uacce)
|
|
{
|
|
struct uacce_queue *q, *next_q;
|
|
|
|
if (!uacce)
|
|
return;
|
|
/*
|
|
* unmap remaining mapping from user space, preventing user still
|
|
* access the mmaped area while parent device is already removed
|
|
*/
|
|
if (uacce->inode)
|
|
unmap_mapping_range(uacce->inode->i_mapping, 0, 0, 1);
|
|
|
|
/* ensure no open queue remains */
|
|
mutex_lock(&uacce->queues_lock);
|
|
list_for_each_entry_safe(q, next_q, &uacce->queues, list) {
|
|
uacce_put_queue(q);
|
|
uacce_unbind_queue(q);
|
|
}
|
|
mutex_unlock(&uacce->queues_lock);
|
|
|
|
/* disable sva now since no opened queues */
|
|
uacce_disable_sva(uacce);
|
|
|
|
if (uacce->cdev)
|
|
cdev_device_del(uacce->cdev, &uacce->dev);
|
|
xa_erase(&uacce_xa, uacce->dev_id);
|
|
put_device(&uacce->dev);
|
|
}
|
|
EXPORT_SYMBOL_GPL(uacce_remove);
|
|
|
|
static int __init uacce_init(void)
|
|
{
|
|
int ret;
|
|
|
|
uacce_class = class_create(THIS_MODULE, UACCE_NAME);
|
|
if (IS_ERR(uacce_class))
|
|
return PTR_ERR(uacce_class);
|
|
|
|
ret = alloc_chrdev_region(&uacce_devt, 0, MINORMASK, UACCE_NAME);
|
|
if (ret)
|
|
class_destroy(uacce_class);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static __exit void uacce_exit(void)
|
|
{
|
|
unregister_chrdev_region(uacce_devt, MINORMASK);
|
|
class_destroy(uacce_class);
|
|
}
|
|
|
|
subsys_initcall(uacce_init);
|
|
module_exit(uacce_exit);
|
|
|
|
MODULE_LICENSE("GPL");
|
|
MODULE_AUTHOR("HiSilicon Tech. Co., Ltd.");
|
|
MODULE_DESCRIPTION("Accelerator interface for Userland applications");
|