03544505cb
According to a downstream commit I found in the Khadas vendor kernel, the GPU on G12b is wired up for ACE-lite, so (now that Panfrost knows how to handle this properly) we should describe it as such. Otherwise the mismatch leads to all manner of fun with mismatched attributes and inadvertently snooping stale data from caches, which would account for at least some of the brokenness observed on this platform. Signed-off-by: Robin Murphy <robin.murphy@arm.com> Tested-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Link: https://patchwork.freedesktop.org/patch/msgid/765446e529e50b304af63432da7836c4d31eb8d4.1600780574.git.robin.murphy@arm.com
142 lines
2.7 KiB
Plaintext
142 lines
2.7 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2019 BayLibre, SAS
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* Author: Neil Armstrong <narmstrong@baylibre.com>
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*/
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#include "meson-g12.dtsi"
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/ {
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compatible = "amlogic,g12b";
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cpus {
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#address-cells = <0x2>;
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#size-cells = <0x0>;
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cpu-map {
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cluster0 {
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core0 {
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cpu = <&cpu0>;
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};
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core1 {
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cpu = <&cpu1>;
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};
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};
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cluster1 {
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core0 {
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cpu = <&cpu100>;
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};
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core1 {
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cpu = <&cpu101>;
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};
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core2 {
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cpu = <&cpu102>;
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};
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core3 {
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cpu = <&cpu103>;
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};
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};
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};
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cpu0: cpu@0 {
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device_type = "cpu";
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compatible = "arm,cortex-a53";
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reg = <0x0 0x0>;
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enable-method = "psci";
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capacity-dmips-mhz = <592>;
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next-level-cache = <&l2>;
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#cooling-cells = <2>;
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};
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cpu1: cpu@1 {
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device_type = "cpu";
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compatible = "arm,cortex-a53";
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reg = <0x0 0x1>;
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enable-method = "psci";
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capacity-dmips-mhz = <592>;
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next-level-cache = <&l2>;
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#cooling-cells = <2>;
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};
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cpu100: cpu@100 {
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device_type = "cpu";
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compatible = "arm,cortex-a73";
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reg = <0x0 0x100>;
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enable-method = "psci";
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capacity-dmips-mhz = <1024>;
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next-level-cache = <&l2>;
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#cooling-cells = <2>;
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};
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cpu101: cpu@101 {
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device_type = "cpu";
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compatible = "arm,cortex-a73";
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reg = <0x0 0x101>;
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enable-method = "psci";
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capacity-dmips-mhz = <1024>;
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next-level-cache = <&l2>;
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#cooling-cells = <2>;
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};
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cpu102: cpu@102 {
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device_type = "cpu";
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compatible = "arm,cortex-a73";
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reg = <0x0 0x102>;
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enable-method = "psci";
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capacity-dmips-mhz = <1024>;
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next-level-cache = <&l2>;
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#cooling-cells = <2>;
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};
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cpu103: cpu@103 {
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device_type = "cpu";
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compatible = "arm,cortex-a73";
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reg = <0x0 0x103>;
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enable-method = "psci";
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capacity-dmips-mhz = <1024>;
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next-level-cache = <&l2>;
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#cooling-cells = <2>;
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};
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l2: l2-cache0 {
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compatible = "cache";
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};
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};
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};
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&clkc {
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compatible = "amlogic,g12b-clkc";
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};
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&cpu_thermal {
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cooling-maps {
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map0 {
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trip = <&cpu_passive>;
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cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
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<&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
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<&cpu100 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
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<&cpu101 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
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<&cpu102 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
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<&cpu103 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
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};
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map1 {
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trip = <&cpu_hot>;
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cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
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<&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
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<&cpu100 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
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<&cpu101 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
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<&cpu102 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
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<&cpu103 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
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};
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};
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};
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&mali {
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dma-coherent;
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};
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