cec6515abb
flush_tlb_range is special in that we don't specify the page size used for the translation. Hence when flushing TLB we flush the translation cache for all possible page sizes. The kernel also uses the same interface when moving page tables around. Such a move requires us to flush the page walk cache. Instead of adding another interface to force page walk cache flush, update flush_tlb_range to flush page walk cache if the range flushed is more than the PMD range. A page table move will always involve an invalidate range more than PMD_SIZE. Running microbenchmark with mprotect and parallel memory access didn't show any observable performance impact. Link: https://lkml.kernel.org/r/20210616045735.374532-3-aneesh.kumar@linux.ibm.com Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.ibm.com> Cc: Christophe Leroy <christophe.leroy@csgroup.eu> Cc: Hugh Dickins <hughd@google.com> Cc: Joel Fernandes <joel@joelfernandes.org> Cc: Kalesh Singh <kaleshsingh@google.com> Cc: Kirill A. Shutemov <kirill.shutemov@linux.intel.com> Cc: Michael Ellerman <mpe@ellerman.id.au> Cc: Nicholas Piggin <npiggin@gmail.com> Cc: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
115 lines
3.1 KiB
C
115 lines
3.1 KiB
C
// SPDX-License-Identifier: GPL-2.0
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#include <linux/mm.h>
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#include <linux/hugetlb.h>
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#include <linux/security.h>
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#include <asm/cacheflush.h>
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#include <asm/machdep.h>
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#include <asm/mman.h>
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#include <asm/tlb.h>
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void radix__flush_hugetlb_page(struct vm_area_struct *vma, unsigned long vmaddr)
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{
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int psize;
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struct hstate *hstate = hstate_file(vma->vm_file);
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psize = hstate_get_psize(hstate);
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radix__flush_tlb_page_psize(vma->vm_mm, vmaddr, psize);
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}
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void radix__local_flush_hugetlb_page(struct vm_area_struct *vma, unsigned long vmaddr)
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{
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int psize;
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struct hstate *hstate = hstate_file(vma->vm_file);
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psize = hstate_get_psize(hstate);
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radix__local_flush_tlb_page_psize(vma->vm_mm, vmaddr, psize);
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}
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void radix__flush_hugetlb_tlb_range(struct vm_area_struct *vma, unsigned long start,
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unsigned long end)
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{
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int psize;
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struct hstate *hstate = hstate_file(vma->vm_file);
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psize = hstate_get_psize(hstate);
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/*
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* Flush PWC even if we get PUD_SIZE hugetlb invalidate to keep this simpler.
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*/
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if (end - start >= PUD_SIZE)
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radix__flush_tlb_pwc_range_psize(vma->vm_mm, start, end, psize);
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else
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radix__flush_tlb_range_psize(vma->vm_mm, start, end, psize);
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}
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/*
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* A vairant of hugetlb_get_unmapped_area doing topdown search
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* FIXME!! should we do as x86 does or non hugetlb area does ?
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* ie, use topdown or not based on mmap_is_legacy check ?
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*/
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unsigned long
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radix__hugetlb_get_unmapped_area(struct file *file, unsigned long addr,
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unsigned long len, unsigned long pgoff,
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unsigned long flags)
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{
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struct mm_struct *mm = current->mm;
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struct vm_area_struct *vma;
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struct hstate *h = hstate_file(file);
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int fixed = (flags & MAP_FIXED);
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unsigned long high_limit;
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struct vm_unmapped_area_info info;
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high_limit = DEFAULT_MAP_WINDOW;
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if (addr >= high_limit || (fixed && (addr + len > high_limit)))
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high_limit = TASK_SIZE;
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if (len & ~huge_page_mask(h))
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return -EINVAL;
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if (len > high_limit)
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return -ENOMEM;
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if (fixed) {
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if (addr > high_limit - len)
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return -ENOMEM;
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if (prepare_hugepage_range(file, addr, len))
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return -EINVAL;
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return addr;
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}
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if (addr) {
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addr = ALIGN(addr, huge_page_size(h));
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vma = find_vma(mm, addr);
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if (high_limit - len >= addr && addr >= mmap_min_addr &&
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(!vma || addr + len <= vm_start_gap(vma)))
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return addr;
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}
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/*
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* We are always doing an topdown search here. Slice code
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* does that too.
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*/
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info.flags = VM_UNMAPPED_AREA_TOPDOWN;
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info.length = len;
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info.low_limit = max(PAGE_SIZE, mmap_min_addr);
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info.high_limit = mm->mmap_base + (high_limit - DEFAULT_MAP_WINDOW);
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info.align_mask = PAGE_MASK & ~huge_page_mask(h);
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info.align_offset = 0;
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return vm_unmapped_area(&info);
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}
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void radix__huge_ptep_modify_prot_commit(struct vm_area_struct *vma,
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unsigned long addr, pte_t *ptep,
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pte_t old_pte, pte_t pte)
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{
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struct mm_struct *mm = vma->vm_mm;
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/*
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* To avoid NMMU hang while relaxing access we need to flush the tlb before
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* we set the new value.
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*/
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if (is_pte_rw_upgrade(pte_val(old_pte), pte_val(pte)) &&
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(atomic_read(&mm->context.copros) > 0))
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radix__flush_hugetlb_page(vma, addr);
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set_huge_pte_at(vma->vm_mm, addr, ptep, pte);
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}
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