559549b1f2
After commit f1ad5338a4d5 ("of: Fix "dma-ranges" handling for bus
controllers"), the dma-ranges of the leaf node doesn't work. Remove
it for jpeg here.
Currently there is only mt8195 jpeg node has this property in upstream,
and it already uses parent-child node, this property did work. But instead,
MediaTek iommu will control the masters' iova ranges by the master's
larb/port id internally, then this property is unnecessary.
Cc: Mauro Carvalho Chehab <mchehab@kernel.org>
Cc: Matthias Brugger <matthias.bgg@gmail.com>
Cc: Bin Liu <bin.liu@mediatek.com>
Cc: kyrie wu <kyrie.wu@mediatek.corp-partner.google.com>
Cc: Xia Jiang <xia.jiang@mediatek.com>
Signed-off-by: Yong Wu <yong.wu@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
Link: https://lore.kernel.org/r/20230411093144.2690-3-yong.wu@mediatek.com
Signed-off-by: Joerg Roedel <jroedel@suse.de>
141 lines
3.8 KiB
YAML
141 lines
3.8 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/media/mediatek,mt8195-jpegenc.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: MediaTek JPEG Encoder
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maintainers:
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- kyrie wu <kyrie.wu@mediatek.corp-partner.google.com>
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description:
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MediaTek JPEG Encoder is the JPEG encode hardware present in MediaTek SoCs
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properties:
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compatible:
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const: mediatek,mt8195-jpgenc
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power-domains:
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maxItems: 1
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iommus:
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maxItems: 4
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description:
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Points to the respective IOMMU block with master port as argument, see
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Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml for details.
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Ports are according to the HW.
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"#address-cells":
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const: 2
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"#size-cells":
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const: 2
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ranges: true
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# Required child node:
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patternProperties:
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"^jpgenc@[0-9a-f]+$":
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type: object
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description:
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The jpeg encoder hardware device node which should be added as subnodes to
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the main jpeg node.
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properties:
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compatible:
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const: mediatek,mt8195-jpgenc-hw
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reg:
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maxItems: 1
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iommus:
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minItems: 1
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maxItems: 32
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description:
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List of the hardware port in respective IOMMU block for current Socs.
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Refer to bindings/iommu/mediatek,iommu.yaml.
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interrupts:
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maxItems: 1
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clocks:
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maxItems: 1
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clock-names:
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items:
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- const: jpgenc
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power-domains:
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maxItems: 1
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required:
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- compatible
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- reg
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- iommus
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- interrupts
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- clocks
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- clock-names
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- power-domains
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additionalProperties: false
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required:
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- compatible
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- power-domains
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- iommus
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- ranges
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/memory/mt8195-memory-port.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/clock/mt8195-clk.h>
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#include <dt-bindings/power/mt8195-power.h>
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soc {
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#address-cells = <2>;
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#size-cells = <2>;
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jpgenc-master {
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compatible = "mediatek,mt8195-jpgenc";
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power-domains = <&spm MT8195_POWER_DOMAIN_VENC_CORE1>;
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iommus = <&iommu_vpp M4U_PORT_L20_JPGENC_Y_RDMA>,
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<&iommu_vpp M4U_PORT_L20_JPGENC_C_RDMA>,
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<&iommu_vpp M4U_PORT_L20_JPGENC_Q_TABLE>,
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<&iommu_vpp M4U_PORT_L20_JPGENC_BSDMA>;
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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jpgenc@1a030000 {
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compatible = "mediatek,mt8195-jpgenc-hw";
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reg = <0 0x1a030000 0 0x10000>;
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iommus = <&iommu_vdo M4U_PORT_L19_JPGENC_Y_RDMA>,
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<&iommu_vdo M4U_PORT_L19_JPGENC_C_RDMA>,
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<&iommu_vdo M4U_PORT_L19_JPGENC_Q_TABLE>,
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<&iommu_vdo M4U_PORT_L19_JPGENC_BSDMA>;
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interrupts = <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH 0>;
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clocks = <&vencsys CLK_VENC_JPGENC>;
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clock-names = "jpgenc";
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power-domains = <&spm MT8195_POWER_DOMAIN_VENC>;
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};
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jpgenc@1b030000 {
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compatible = "mediatek,mt8195-jpgenc-hw";
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reg = <0 0x1b030000 0 0x10000>;
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iommus = <&iommu_vpp M4U_PORT_L20_JPGENC_Y_RDMA>,
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<&iommu_vpp M4U_PORT_L20_JPGENC_C_RDMA>,
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<&iommu_vpp M4U_PORT_L20_JPGENC_Q_TABLE>,
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<&iommu_vpp M4U_PORT_L20_JPGENC_BSDMA>;
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interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH 0>;
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clocks = <&vencsys_core1 CLK_VENC_CORE1_JPGENC>;
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clock-names = "jpgenc";
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power-domains = <&spm MT8195_POWER_DOMAIN_VENC_CORE1>;
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};
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};
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};
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