84e85359f4
The Devicetree bindings document does not have to say in the title that
it is a "binding", but instead just describe the hardware.
Drop trailing "bindings" in various forms (also with trailing full
stop):
find Documentation/devicetree/bindings/ -type f -name '*.yaml' \
-not -name 'trivial-devices.yaml' \
-exec sed -i -e 's/^title: \(.*\) [bB]indings\?\.\?$/title: \1/' {} \;
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Acked-by: Matti Vaittinen <mazziesaccount@gmail.com> # ROHM
Acked-by: Ulf Hansson <ulf.hansson@linaro.org> # MMC
Acked-by: Stephen Boyd <sboyd@kernel.org> # clk
Acked-by: Dmitry Torokhov <dmitry.torokhov@gmail.com> # input
Acked-by: Mark Brown <broonie@kernel.org>
Acked-by: Hans Verkuil <hverkuil-cisco@xs4all.nl> # media
Acked-by: Sebastian Reichel <sre@kernel.org> # power
Acked-by: Viresh Kumar <viresh.kumar@linaro.org> # cpufreq
Link: https://lore.kernel.org/r/20221216163815.522628-7-krzysztof.kozlowski@linaro.org
Signed-off-by: Rob Herring <robh@kernel.org>
52 lines
1.3 KiB
YAML
52 lines
1.3 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/opp/opp-v1.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Generic OPP (Operating Performance Points) v1
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maintainers:
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- Viresh Kumar <viresh.kumar@linaro.org>
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description: |+
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Devices work at voltage-current-frequency combinations and some implementations
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have the liberty of choosing these. These combinations are called Operating
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Performance Points aka OPPs. This document defines bindings for these OPPs
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applicable across wide range of devices. For illustration purpose, this document
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uses CPU as a device.
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This binding only supports voltage-frequency pairs.
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select: true
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properties:
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operating-points:
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$ref: /schemas/types.yaml#/definitions/uint32-matrix
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items:
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items:
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- description: Frequency in kHz
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- description: Voltage for OPP in uV
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additionalProperties: true
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examples:
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- |
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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compatible = "arm,cortex-a9";
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device_type = "cpu";
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reg = <0>;
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next-level-cache = <&L2>;
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operating-points =
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/* kHz uV */
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<792000 1100000>,
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<396000 950000>,
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<198000 850000>;
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};
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};
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...
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