Luc Van Oostenryck 889d746edd riscv: add riscv-specific predefines to CHECKFLAGS ... RISC-V uses the macro __riscv_xlen, predefined by GCC, to make the distinction between 32 or 64 bit code. However, sparse doesn't know anything about this macro which lead to wrong warnings and failures. Fix this by adding a define of __riscv_xlen to CHECKFLAGS and add one for __riscv too. Signed-off-by: Luc Van Oostenryck <luc.vanoostenryck@gmail.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>		2018-06-11 09:03:43 -07:00
..
configs	RISC-V: Enable module support in defconfig	2018-04-02 20:00:56 -07:00
include	perf: riscv: preliminary RISC-V support	2018-06-04 14:02:01 -07:00
kernel	perf: riscv: preliminary RISC-V support	2018-06-04 14:02:01 -07:00
lib	riscv: Fix the bug in memory access fixup code	2018-06-04 13:33:31 -07:00
mm	RISC-V changes for 4.16	2018-02-07 11:33:08 -08:00
Kconfig	perf: riscv: preliminary RISC-V support	2018-06-04 14:02:01 -07:00
Makefile	riscv: add riscv-specific predefines to CHECKFLAGS	2018-06-11 09:03:43 -07:00