4202633a3a
When USB_COMMON are not enabled, phy-rtk-usb2 and phy-rtk-usb3 suffers a build error due to a missing usb_debug_root that is provided by CONFIG_USB_COMMON, so make the driver select USB_COMMON. or1k-linux-ld: drivers/phy/realtek/phy-rtk-usb2.o: in function `create_phy_debug_root': >> drivers/phy/realtek/phy-rtk-usb2.c:715: undefined reference to `usb_debug_root' >> or1k-linux-ld: drivers/phy/realtek/phy-rtk-usb2.c:715: undefined reference to `usb_debug_root' or1k-linux-ld: drivers/phy/realtek/phy-rtk-usb3.o: in function `create_phy_debug_root': >> drivers/phy/realtek/phy-rtk-usb3.c:349: undefined reference to `usb_debug_root' >> or1k-linux-ld: drivers/phy/realtek/phy-rtk-usb3.c:349: undefined reference to `usb_debug_root' Fixes:134e6d25f6("phy: realtek: usb: Add driver for the Realtek SoC USB 2.0 PHY") Fixed:adda6e82a7("phy: realtek: usb: Add driver for the Realtek SoC USB 3.0 PHY") Reported-by: kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/oe-kbuild-all/202307290733.weSlHrGp-lkp@intel.com/ Closes: https://lore.kernel.org/oe-kbuild-all/202307291022.3pVeTR9z-lkp@intel.com/ Signed-off-by: Stanley Chang <stanley_chang@realtek.com> Link: https://lore.kernel.org/r/20230729053029.6226-1-stanley_chang@realtek.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
28 lines
820 B
Plaintext
28 lines
820 B
Plaintext
# SPDX-License-Identifier: GPL-2.0
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#
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# Phy drivers for Realtek platforms
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#
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config PHY_RTK_RTD_USB2PHY
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tristate "Realtek RTD USB2 PHY Transceiver Driver"
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depends on USB_SUPPORT
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select GENERIC_PHY
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select USB_PHY
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select USB_COMMON
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help
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Enable this to support Realtek SoC USB2 phy transceiver.
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The DHC (digital home center) RTD series SoCs used the Synopsys
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DWC3 USB IP. This driver will do the PHY initialization
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of the parameters.
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config PHY_RTK_RTD_USB3PHY
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tristate "Realtek RTD USB3 PHY Transceiver Driver"
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depends on USB_SUPPORT
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select GENERIC_PHY
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select USB_PHY
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select USB_COMMON
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help
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Enable this to support Realtek SoC USB3 phy transceiver.
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The DHC (digital home center) RTD series SoCs used the Synopsys
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DWC3 USB IP. This driver will do the PHY initialization
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of the parameters.
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