d12157efc8
Most architectures define the atomic/atomic64 xchg and cmpxchg operations in terms of arch_xchg and arch_cmpxchg respectfully. Add fallbacks for these cases and remove the trivial cases from arch code. On some architectures the existing definitions are kept as these are used to build other arch_atomic*() operations. Signed-off-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Reviewed-by: Kees Cook <keescook@chromium.org> Link: https://lore.kernel.org/r/20230605070124.3741859-5-mark.rutland@arm.com
37 lines
658 B
C
37 lines
658 B
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
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*/
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#ifndef _ASM_ARC_ATOMIC_H
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#define _ASM_ARC_ATOMIC_H
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#ifndef __ASSEMBLY__
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#include <linux/types.h>
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#include <linux/compiler.h>
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#include <asm/cmpxchg.h>
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#include <asm/barrier.h>
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#include <asm/smp.h>
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#define arch_atomic_read(v) READ_ONCE((v)->counter)
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#ifdef CONFIG_ARC_HAS_LLSC
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#include <asm/atomic-llsc.h>
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#else
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#include <asm/atomic-spinlock.h>
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#endif
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/*
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* 64-bit atomics
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*/
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#ifdef CONFIG_GENERIC_ATOMIC64
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#include <asm-generic/atomic64.h>
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#else
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#include <asm/atomic64-arcv2.h>
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#endif
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#endif /* !__ASSEMBLY__ */
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#endif
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