Geert Uytterhoeven 8a6d97a46d clk: renesas: rcar-gen3: Loop to find best rate in cpg_sd_clock_round_rate()
cpg_sd_clock_round_rate() really needs the best rate, not the best
divider.  Hence change the iteration to find the former, and get rid of
the final division.

Add an out-of-range rate check while at it.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/20190830134515.11925-6-geert+renesas@glider.be
2019-10-01 10:24:55 +02:00
..
2019-09-22 09:39:09 -07:00
2019-09-24 15:54:11 -07:00
2019-09-30 10:04:28 -07:00
2019-09-29 19:25:39 -07:00
2019-09-22 09:30:30 -07:00
2019-09-22 09:30:30 -07:00
2019-09-22 09:39:09 -07:00
2019-09-19 14:14:28 -07:00
2019-09-30 10:04:28 -07:00
2019-09-18 11:14:31 -07:00
2019-09-27 12:19:47 -07:00
2019-09-27 11:13:35 -07:00
2019-09-22 12:02:21 -07:00
2019-09-29 11:20:41 -07:00
2019-09-28 20:44:12 +02:00
2019-09-19 14:14:28 -07:00
2019-09-19 14:14:28 -07:00
2019-09-29 10:00:14 -07:00
2019-09-22 09:30:30 -07:00
2019-09-24 16:31:50 -07:00
2019-09-22 09:30:30 -07:00
2019-09-23 17:20:40 -04:00
2019-09-29 10:33:41 -07:00
2019-09-24 16:31:50 -07:00
2019-09-19 13:27:23 -07:00
2019-09-23 19:16:01 -07:00
2019-09-24 12:39:40 -07:00
2019-09-27 12:19:47 -07:00
2019-09-17 18:40:42 -07:00
2019-09-22 10:55:08 -07:00
2019-09-30 10:04:28 -07:00
2019-09-22 11:05:43 -07:00
2019-09-24 16:31:50 -07:00
2019-09-16 15:52:38 -07:00
2019-09-22 10:52:23 -07:00
2019-09-17 18:40:42 -07:00
2019-09-24 15:54:08 -07:00
2019-09-24 15:54:08 -07:00
2019-09-18 11:14:31 -07:00
2019-09-23 19:33:56 -07:00
2019-09-27 11:17:38 -07:00
2019-09-26 11:22:14 -07:00
2019-09-18 11:05:34 -07:00