core: - extract i915 eDP backlight into core - DP aux bus support - drm_device.irq_enabled removed - port drivers to native irq interfaces - export gem shadow plane handling for vgem - print proper driver name in framebuffer registration - driver fixes for implicit fencing rules - ARM fixed rate compression modifier added - updated fb damage handling - rmfb ioctl logging/docs - drop drm_gem_object_put_locked - define DRM_FORMAT_MAX_PLANES - add gem fb vmap/vunmap helpers - add lockdep_assert(once) helpers - mark drm irq midlayer as legacy - use offset adjusted bo mapping conversion vgaarb: - cleanups fbdev: - extend efifb handling to all arches - div by 0 fixes for multiple drivers udmabuf: - add hugepage mapping support dma-buf: - non-dynamic exporter fixups - document implicit fencing rules amdgpu: - Initial Cyan Skillfish support - switch virtual DCE over to vkms based atomic - VCN/JPEG power down fixes - NAVI PCIE link handling fixes - AMD HDMI freesync fixes - Yellow Carp + Beige Goby fixes - Clockgating/S0ix/SMU/EEPROM fixes - embed hw fence in job - rework dma-resv handling - ensure eviction to system ram amdkfd: - uapi: SVM address range query added - sysfs leak fix - GPUVM TLB optimizations - vmfault/migration counters i915: - Enable JSL and EHL by default - preliminary XeHP/DG2 support - remove all CNL support (never shipped) - move to TTM for discrete memory support - allow mixed object mmap handling - GEM uAPI spring cleaning - add I915_MMAP_OBJECT_FIXED - reinstate ADL-P mmap ioctls - drop a bunch of unused by userspace features - disable and remove GPU relocations - revert some i915 misfeatures - major refactoring of GuC for Gen11+ - execbuffer object locking separate step - reject caching/set-domain on discrete - Enable pipe DMC loading on XE-LPD and ADL-P - add PSF GV point support - Refactor and fix DDI buffer translations - Clean up FBC CFB allocation code - Finish INTEL_GEN() and friends macro conversions nouveau: - add eDP backlight support - implicit fence fix msm: - a680/7c3 support - drm/scheduler conversion panfrost: - rework GPU reset virtio: - fix fencing for planes ast: - add detect support bochs: - move to tiny GPU driver vc4: - use hotplug irqs - HDMI codec support vmwgfx: - use internal vmware device headers ingenic: - demidlayering irq rcar-du: - shutdown fixes - convert to bridge connector helpers zynqmp-dsub: - misc fixes mgag200: - convert PLL handling to atomic mediatek: - MT8133 AAL support - gem mmap object support - MT8167 support etnaviv: - NXP Layerscape LS1028A SoC support - GEM mmap cleanups tegra: - new user API exynos: - missing unlock fix - build warning fix - use refcount_t -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEEEKbZHaGwW9KfbeusDHTzWXnEhr4FAmEtvn8ACgkQDHTzWXnE hr7aqw//WfcIyGdPLjAz59cW8jm+FgihD5colHtOUYRHRO4GeX/bNNufquR8+N3y HESsyZdpihFHms/wURMq41ibmHg0EuHA01HZzjZuGBesG4F9I8sP/HnDOxDuYuAx N7Lg4PlUNlfFHmw7Y84owQ6s/XWmNp5iZ8e/mTK5hcraJFQKS4QO74n9RbG/F1vC Hc3P6AnpqGac2AEGXt0NjIRxVVCTUIBGx+XOhj+1AMyAGzt9VcO1DS9PVCS0zsEy zKMj9tZAPNg0wYsXAi4kA1lK7uVY8KoXSVDYLpsI5Or2/e7mfq2b4EWrezbtp6UA H+w86axuwJq7NaYHYH6HqyrLTOmvcHgIl2LoZN91KaNt61xfJT3XZkyQoYViGIrJ oZy6X/+s+WPoW98bHZrr6vbcxtWKfEeQyUFEAaDMmraKNJwROjtwgFC9DP8MDctq PUSM+XkwbGRRxQfv9dNKufeWfV5blVfzEJO8EfTU1YET3WTDaUHe/FoIcLZt2DZG JAJgZkIlU8egthPdakUjQz/KoyLMyovcN5zcjgzgjA9PyNEq74uElN9l446kSSxu jEVErOdd+aG3Zzk7/ZZL/RmpNQpPfpQ2RaPUkgeUsW01myNzUNuU3KUDaSlVa+Oi 1n7eKoaQ2to/+LjhYApVriri4hIZckNNn5FnnhkgwGi8mpHQIVQ= =vZkA -----END PGP SIGNATURE----- Merge tag 'drm-next-2021-08-31-1' of git://anongit.freedesktop.org/drm/drm Pull drm updates from Dave Airlie: "Highlights: - i915 has seen a lot of refactoring and uAPI cleanups due to a change in the upstream direction going forward This has all been audited with known userspace, but there may be some pitfalls that were missed. - i915 now uses common TTM to enable discrete memory on DG1/2 GPUs - i915 enables Jasper and Elkhart Lake by default and has preliminary XeHP/DG2 support - amdgpu adds support for Cyan Skillfish - lots of implicit fencing rules documented and fixed up in drivers - msm now uses the core scheduler - the irq midlayer has been removed for non-legacy drivers - the sysfb code now works on more than x86. Otherwise the usual smattering of stuff everywhere, panels, bridges, refactorings. Detailed summary: core: - extract i915 eDP backlight into core - DP aux bus support - drm_device.irq_enabled removed - port drivers to native irq interfaces - export gem shadow plane handling for vgem - print proper driver name in framebuffer registration - driver fixes for implicit fencing rules - ARM fixed rate compression modifier added - updated fb damage handling - rmfb ioctl logging/docs - drop drm_gem_object_put_locked - define DRM_FORMAT_MAX_PLANES - add gem fb vmap/vunmap helpers - add lockdep_assert(once) helpers - mark drm irq midlayer as legacy - use offset adjusted bo mapping conversion vgaarb: - cleanups fbdev: - extend efifb handling to all arches - div by 0 fixes for multiple drivers udmabuf: - add hugepage mapping support dma-buf: - non-dynamic exporter fixups - document implicit fencing rules amdgpu: - Initial Cyan Skillfish support - switch virtual DCE over to vkms based atomic - VCN/JPEG power down fixes - NAVI PCIE link handling fixes - AMD HDMI freesync fixes - Yellow Carp + Beige Goby fixes - Clockgating/S0ix/SMU/EEPROM fixes - embed hw fence in job - rework dma-resv handling - ensure eviction to system ram amdkfd: - uapi: SVM address range query added - sysfs leak fix - GPUVM TLB optimizations - vmfault/migration counters i915: - Enable JSL and EHL by default - preliminary XeHP/DG2 support - remove all CNL support (never shipped) - move to TTM for discrete memory support - allow mixed object mmap handling - GEM uAPI spring cleaning - add I915_MMAP_OBJECT_FIXED - reinstate ADL-P mmap ioctls - drop a bunch of unused by userspace features - disable and remove GPU relocations - revert some i915 misfeatures - major refactoring of GuC for Gen11+ - execbuffer object locking separate step - reject caching/set-domain on discrete - Enable pipe DMC loading on XE-LPD and ADL-P - add PSF GV point support - Refactor and fix DDI buffer translations - Clean up FBC CFB allocation code - Finish INTEL_GEN() and friends macro conversions nouveau: - add eDP backlight support - implicit fence fix msm: - a680/7c3 support - drm/scheduler conversion panfrost: - rework GPU reset virtio: - fix fencing for planes ast: - add detect support bochs: - move to tiny GPU driver vc4: - use hotplug irqs - HDMI codec support vmwgfx: - use internal vmware device headers ingenic: - demidlayering irq rcar-du: - shutdown fixes - convert to bridge connector helpers zynqmp-dsub: - misc fixes mgag200: - convert PLL handling to atomic mediatek: - MT8133 AAL support - gem mmap object support - MT8167 support etnaviv: - NXP Layerscape LS1028A SoC support - GEM mmap cleanups tegra: - new user API exynos: - missing unlock fix - build warning fix - use refcount_t" * tag 'drm-next-2021-08-31-1' of git://anongit.freedesktop.org/drm/drm: (1318 commits) drm/amd/display: Move AllowDRAMSelfRefreshOrDRAMClockChangeInVblank to bounding box drm/amd/display: Remove duplicate dml init drm/amd/display: Update bounding box states (v2) drm/amd/display: Update number of DCN3 clock states drm/amdgpu: disable GFX CGCG in aldebaran drm/amdgpu: Clear RAS interrupt status on aldebaran drm/amdgpu: Add support for RAS XGMI err query drm/amdkfd: Account for SH/SE count when setting up cu masks. drm/amdgpu: rename amdgpu_bo_get_preferred_pin_domain drm/amdgpu: drop redundant cancel_delayed_work_sync call drm/amdgpu: add missing cleanups for more ASICs on UVD/VCE suspend drm/amdgpu: add missing cleanups for Polaris12 UVD/VCE on suspend drm/amdkfd: map SVM range with correct access permission drm/amdkfd: check access permisson to restore retry fault drm/amdgpu: Update RAS XGMI Error Query drm/amdgpu: Add driver infrastructure for MCA RAS drm/amd/display: Add Logging for HDMI color depth information drm/amd/amdgpu: consolidate PSP TA init shared buf functions drm/amd/amdgpu: add name field back to ras_common_if drm/amdgpu: Fix build with missing pm_suspend_target_state module export ...
271 lines
7.5 KiB
C
271 lines
7.5 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (c) 2015 MediaTek Inc.
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* Author: CK Hu <ck.hu@mediatek.com>
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*/
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#include <drm/drm_atomic.h>
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#include <drm/drm_atomic_helper.h>
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#include <drm/drm_atomic_uapi.h>
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#include <drm/drm_fourcc.h>
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#include <drm/drm_gem_atomic_helper.h>
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#include <drm/drm_plane_helper.h>
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#include "mtk_drm_crtc.h"
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#include "mtk_drm_ddp_comp.h"
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#include "mtk_drm_drv.h"
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#include "mtk_drm_gem.h"
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#include "mtk_drm_plane.h"
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static const u32 formats[] = {
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DRM_FORMAT_XRGB8888,
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DRM_FORMAT_ARGB8888,
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DRM_FORMAT_BGRX8888,
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DRM_FORMAT_BGRA8888,
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DRM_FORMAT_ABGR8888,
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DRM_FORMAT_XBGR8888,
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DRM_FORMAT_RGB888,
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DRM_FORMAT_BGR888,
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DRM_FORMAT_RGB565,
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DRM_FORMAT_UYVY,
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DRM_FORMAT_YUYV,
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};
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static void mtk_plane_reset(struct drm_plane *plane)
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{
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struct mtk_plane_state *state;
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if (plane->state) {
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__drm_atomic_helper_plane_destroy_state(plane->state);
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state = to_mtk_plane_state(plane->state);
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memset(state, 0, sizeof(*state));
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} else {
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state = kzalloc(sizeof(*state), GFP_KERNEL);
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if (!state)
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return;
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plane->state = &state->base;
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}
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state->base.plane = plane;
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state->pending.format = DRM_FORMAT_RGB565;
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}
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static struct drm_plane_state *mtk_plane_duplicate_state(struct drm_plane *plane)
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{
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struct mtk_plane_state *old_state = to_mtk_plane_state(plane->state);
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struct mtk_plane_state *state;
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state = kzalloc(sizeof(*state), GFP_KERNEL);
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if (!state)
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return NULL;
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__drm_atomic_helper_plane_duplicate_state(plane, &state->base);
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WARN_ON(state->base.plane != plane);
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state->pending = old_state->pending;
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return &state->base;
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}
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static void mtk_drm_plane_destroy_state(struct drm_plane *plane,
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struct drm_plane_state *state)
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{
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__drm_atomic_helper_plane_destroy_state(state);
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kfree(to_mtk_plane_state(state));
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}
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static int mtk_plane_atomic_async_check(struct drm_plane *plane,
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struct drm_atomic_state *state)
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{
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struct drm_plane_state *new_plane_state = drm_atomic_get_new_plane_state(state,
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plane);
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struct drm_crtc_state *crtc_state;
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int ret;
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if (plane != new_plane_state->crtc->cursor)
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return -EINVAL;
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if (!plane->state)
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return -EINVAL;
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if (!plane->state->fb)
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return -EINVAL;
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ret = mtk_drm_crtc_plane_check(new_plane_state->crtc, plane,
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to_mtk_plane_state(new_plane_state));
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if (ret)
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return ret;
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if (state)
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crtc_state = drm_atomic_get_existing_crtc_state(state,
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new_plane_state->crtc);
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else /* Special case for asynchronous cursor updates. */
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crtc_state = new_plane_state->crtc->state;
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return drm_atomic_helper_check_plane_state(plane->state, crtc_state,
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DRM_PLANE_HELPER_NO_SCALING,
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DRM_PLANE_HELPER_NO_SCALING,
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true, true);
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}
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static void mtk_plane_update_new_state(struct drm_plane_state *new_state,
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struct mtk_plane_state *mtk_plane_state)
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{
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struct drm_framebuffer *fb = new_state->fb;
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struct drm_gem_object *gem;
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struct mtk_drm_gem_obj *mtk_gem;
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unsigned int pitch, format;
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dma_addr_t addr;
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gem = fb->obj[0];
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mtk_gem = to_mtk_gem_obj(gem);
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addr = mtk_gem->dma_addr;
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pitch = fb->pitches[0];
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format = fb->format->format;
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addr += (new_state->src.x1 >> 16) * fb->format->cpp[0];
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addr += (new_state->src.y1 >> 16) * pitch;
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mtk_plane_state->pending.enable = true;
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mtk_plane_state->pending.pitch = pitch;
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mtk_plane_state->pending.format = format;
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mtk_plane_state->pending.addr = addr;
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mtk_plane_state->pending.x = new_state->dst.x1;
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mtk_plane_state->pending.y = new_state->dst.y1;
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mtk_plane_state->pending.width = drm_rect_width(&new_state->dst);
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mtk_plane_state->pending.height = drm_rect_height(&new_state->dst);
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mtk_plane_state->pending.rotation = new_state->rotation;
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}
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static void mtk_plane_atomic_async_update(struct drm_plane *plane,
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struct drm_atomic_state *state)
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{
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struct drm_plane_state *new_state = drm_atomic_get_new_plane_state(state,
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plane);
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struct mtk_plane_state *new_plane_state = to_mtk_plane_state(plane->state);
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plane->state->crtc_x = new_state->crtc_x;
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plane->state->crtc_y = new_state->crtc_y;
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plane->state->crtc_h = new_state->crtc_h;
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plane->state->crtc_w = new_state->crtc_w;
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plane->state->src_x = new_state->src_x;
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plane->state->src_y = new_state->src_y;
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plane->state->src_h = new_state->src_h;
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plane->state->src_w = new_state->src_w;
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swap(plane->state->fb, new_state->fb);
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mtk_plane_update_new_state(new_state, new_plane_state);
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wmb(); /* Make sure the above parameters are set before update */
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new_plane_state->pending.async_dirty = true;
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mtk_drm_crtc_async_update(new_state->crtc, plane, state);
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}
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static const struct drm_plane_funcs mtk_plane_funcs = {
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.update_plane = drm_atomic_helper_update_plane,
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.disable_plane = drm_atomic_helper_disable_plane,
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.destroy = drm_plane_cleanup,
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.reset = mtk_plane_reset,
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.atomic_duplicate_state = mtk_plane_duplicate_state,
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.atomic_destroy_state = mtk_drm_plane_destroy_state,
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};
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static int mtk_plane_atomic_check(struct drm_plane *plane,
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struct drm_atomic_state *state)
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{
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struct drm_plane_state *new_plane_state = drm_atomic_get_new_plane_state(state,
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plane);
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struct drm_framebuffer *fb = new_plane_state->fb;
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struct drm_crtc_state *crtc_state;
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int ret;
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if (!fb)
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return 0;
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if (WARN_ON(!new_plane_state->crtc))
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return 0;
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ret = mtk_drm_crtc_plane_check(new_plane_state->crtc, plane,
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to_mtk_plane_state(new_plane_state));
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if (ret)
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return ret;
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crtc_state = drm_atomic_get_crtc_state(state,
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new_plane_state->crtc);
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if (IS_ERR(crtc_state))
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return PTR_ERR(crtc_state);
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return drm_atomic_helper_check_plane_state(new_plane_state,
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crtc_state,
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DRM_PLANE_HELPER_NO_SCALING,
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DRM_PLANE_HELPER_NO_SCALING,
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true, true);
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}
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static void mtk_plane_atomic_disable(struct drm_plane *plane,
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struct drm_atomic_state *state)
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{
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struct drm_plane_state *new_state = drm_atomic_get_new_plane_state(state,
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plane);
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struct mtk_plane_state *mtk_plane_state = to_mtk_plane_state(new_state);
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mtk_plane_state->pending.enable = false;
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wmb(); /* Make sure the above parameter is set before update */
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mtk_plane_state->pending.dirty = true;
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}
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static void mtk_plane_atomic_update(struct drm_plane *plane,
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struct drm_atomic_state *state)
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{
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struct drm_plane_state *new_state = drm_atomic_get_new_plane_state(state,
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plane);
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struct mtk_plane_state *mtk_plane_state = to_mtk_plane_state(new_state);
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if (!new_state->crtc || WARN_ON(!new_state->fb))
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return;
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if (!new_state->visible) {
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mtk_plane_atomic_disable(plane, state);
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return;
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}
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mtk_plane_update_new_state(new_state, mtk_plane_state);
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wmb(); /* Make sure the above parameters are set before update */
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mtk_plane_state->pending.dirty = true;
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}
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static const struct drm_plane_helper_funcs mtk_plane_helper_funcs = {
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.atomic_check = mtk_plane_atomic_check,
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.atomic_update = mtk_plane_atomic_update,
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.atomic_disable = mtk_plane_atomic_disable,
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.atomic_async_update = mtk_plane_atomic_async_update,
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.atomic_async_check = mtk_plane_atomic_async_check,
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};
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int mtk_plane_init(struct drm_device *dev, struct drm_plane *plane,
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unsigned long possible_crtcs, enum drm_plane_type type,
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unsigned int supported_rotations)
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{
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int err;
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err = drm_universal_plane_init(dev, plane, possible_crtcs,
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&mtk_plane_funcs, formats,
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ARRAY_SIZE(formats), NULL, type, NULL);
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if (err) {
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DRM_ERROR("failed to initialize plane\n");
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return err;
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}
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if (supported_rotations & ~DRM_MODE_ROTATE_0) {
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err = drm_plane_create_rotation_property(plane,
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DRM_MODE_ROTATE_0,
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supported_rotations);
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if (err)
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DRM_INFO("Create rotation property failed\n");
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}
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drm_plane_helper_add(plane, &mtk_plane_helper_funcs);
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return 0;
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}
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