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- Add Adapteva Parallella board/DT - Add SPI nodes - Add CAN nodes - Clean Zynq description -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.10 (GNU/Linux) iEYEABECAAYFAlPY12kACgkQykllyylKDCHPeACgj/z4mRSBxcFvwGyjpbSjP8LZ 7xAAn0YCK+PHYCsTcsrUOe9sdUzGFX6j =ta+s -----END PGP SIGNATURE----- Merge tag 'zynq-dt-for-3.17-3' of git://git.xilinx.com/linux-xlnx into next/dt Merge "Xilinx Zynq dt changes for v3.17 - third pull request" from Michal Simek: arm: Xilinx Zynq dt patches for v3.17 third pull request - Add Adapteva Parallella board/DT - Add SPI nodes - Add CAN nodes - Clean Zynq description * tag 'zynq-dt-for-3.17-3' of git://git.xilinx.com/linux-xlnx: ARM: zynq: DT: Clarify Xilinx Zynq platform ARM: zynq: DT: Remove DMA from board DTs ARM: zynq: DT: Add CAN node ARM: dts: zynq: Add SPI ARM: dts: zynq: Add DMAC for Parallella ARM: dts: zynq: Add Parallella device tree Documentation: devicetree: Adapteva boards Documentation: devicetree: Adapteva vendor prefix Signed-off-by: Olof Johansson <olof@lixom.net> |
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