Olivier Moysan 8ba3c5215d
ASoC: stm32: i2s: fix IRQ clearing
Because of regmap cache, interrupts may not be cleared
as expected.
Declare IFCR register as write only and make writings
to IFCR register unconditional.

Signed-off-by: Olivier Moysan <olivier.moysan@st.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2019-02-26 15:36:40 +00:00
..
2019-01-18 15:17:17 +01:00
2019-02-26 15:36:40 +00:00