Peter Ujfalusi 8c0b4fd89e ARM: dts: dra7xx-clocks: Correct mcasp2_ahclkx_mux bit-shift
The correct bit is 24 for AHCLKX.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Acked-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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