c3d275e3a8
Use the SOF_DBG_DUMP_IPC_MESSAGE_PAYLOAD flag to print the message payload instead of the DEBUG_VERBOSE, which would need code modification and kernel re-compilation. Reviewed-by: Kai Vehmanen <kai.vehmanen@linux.intel.com> Reviewed-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com> Reviewed-by: Bard Liao <yung-chuan.liao@linux.intel.com> Signed-off-by: Peter Ujfalusi <peter.ujfalusi@linux.intel.com> Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Link: https://lore.kernel.org/r/20230616100039.378150-7-pierre-louis.bossart@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
747 lines
22 KiB
C
747 lines
22 KiB
C
// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
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//
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// This file is provided under a dual BSD/GPLv2 license. When using or
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// redistributing this file, you may do so under either license.
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//
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// Copyright(c) 2022 Intel Corporation. All rights reserved.
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//
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// Authors: Rander Wang <rander.wang@linux.intel.com>
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// Peter Ujfalusi <peter.ujfalusi@linux.intel.com>
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//
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#include <linux/firmware.h>
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#include <sound/sof/header.h>
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#include <sound/sof/ipc4/header.h>
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#include "sof-priv.h"
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#include "sof-audio.h"
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#include "ipc4-fw-reg.h"
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#include "ipc4-priv.h"
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#include "ops.h"
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static const struct sof_ipc4_fw_status {
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int status;
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char *msg;
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} ipc4_status[] = {
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{0, "The operation was successful"},
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{1, "Invalid parameter specified"},
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{2, "Unknown message type specified"},
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{3, "Not enough space in the IPC reply buffer to complete the request"},
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{4, "The system or resource is busy"},
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{5, "Replaced ADSP IPC PENDING (unused)"},
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{6, "Unknown error while processing the request"},
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{7, "Unsupported operation requested"},
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{8, "Reserved (ADSP_STAGE_UNINITIALIZED removed)"},
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{9, "Specified resource not found"},
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{10, "A resource's ID requested to be created is already assigned"},
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{11, "Reserved (ADSP_IPC_OUT_OF_MIPS removed)"},
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{12, "Required resource is in invalid state"},
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{13, "Requested power transition failed to complete"},
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{14, "Manifest of the library being loaded is invalid"},
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{15, "Requested service or data is unavailable on the target platform"},
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{42, "Library target address is out of storage memory range"},
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{43, "Reserved"},
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{44, "Image verification by CSE failed"},
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{100, "General module management error"},
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{101, "Module loading failed"},
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{102, "Integrity check of the loaded module content failed"},
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{103, "Attempt to unload code of the module in use"},
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{104, "Other failure of module instance initialization request"},
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{105, "Reserved (ADSP_IPC_OUT_OF_MIPS removed)"},
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{106, "Reserved (ADSP_IPC_CONFIG_GET_ERROR removed)"},
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{107, "Reserved (ADSP_IPC_CONFIG_SET_ERROR removed)"},
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{108, "Reserved (ADSP_IPC_LARGE_CONFIG_GET_ERROR removed)"},
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{109, "Reserved (ADSP_IPC_LARGE_CONFIG_SET_ERROR removed)"},
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{110, "Invalid (out of range) module ID provided"},
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{111, "Invalid module instance ID provided"},
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{112, "Invalid queue (pin) ID provided"},
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{113, "Invalid destination queue (pin) ID provided"},
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{114, "Reserved (ADSP_IPC_BIND_UNBIND_DST_SINK_UNSUPPORTED removed)"},
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{115, "Reserved (ADSP_IPC_UNLOAD_INST_EXISTS removed)"},
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{116, "Invalid target code ID provided"},
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{117, "Injection DMA buffer is too small for probing the input pin"},
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{118, "Extraction DMA buffer is too small for probing the output pin"},
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{120, "Invalid ID of configuration item provided in TLV list"},
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{121, "Invalid length of configuration item provided in TLV list"},
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{122, "Invalid structure of configuration item provided"},
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{140, "Initialization of DMA Gateway failed"},
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{141, "Invalid ID of gateway provided"},
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{142, "Setting state of DMA Gateway failed"},
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{143, "DMA_CONTROL message targeting gateway not allocated yet"},
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{150, "Attempt to configure SCLK while I2S port is running"},
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{151, "Attempt to configure MCLK while I2S port is running"},
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{152, "Attempt to stop SCLK that is not running"},
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{153, "Attempt to stop MCLK that is not running"},
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{160, "Reserved (ADSP_IPC_PIPELINE_NOT_INITIALIZED removed)"},
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{161, "Reserved (ADSP_IPC_PIPELINE_NOT_EXIST removed)"},
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{162, "Reserved (ADSP_IPC_PIPELINE_SAVE_FAILED removed)"},
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{163, "Reserved (ADSP_IPC_PIPELINE_RESTORE_FAILED removed)"},
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{165, "Reserved (ADSP_IPC_PIPELINE_ALREADY_EXISTS removed)"},
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};
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static int sof_ipc4_check_reply_status(struct snd_sof_dev *sdev, u32 status)
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{
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int i, ret;
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status &= SOF_IPC4_REPLY_STATUS;
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if (!status)
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return 0;
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for (i = 0; i < ARRAY_SIZE(ipc4_status); i++) {
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if (ipc4_status[i].status == status) {
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dev_err(sdev->dev, "FW reported error: %u - %s\n",
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status, ipc4_status[i].msg);
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goto to_errno;
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}
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}
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if (i == ARRAY_SIZE(ipc4_status))
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dev_err(sdev->dev, "FW reported error: %u - Unknown\n", status);
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to_errno:
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switch (status) {
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case 8:
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case 11:
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case 105 ... 109:
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case 114 ... 115:
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case 160 ... 163:
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case 165:
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ret = -ENOENT;
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break;
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case 4:
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case 150:
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case 151:
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ret = -EBUSY;
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break;
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default:
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ret = -EINVAL;
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break;
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}
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return ret;
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}
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#if IS_ENABLED(CONFIG_SND_SOC_SOF_DEBUG_VERBOSE_IPC)
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#define DBG_IPC4_MSG_TYPE_ENTRY(type) [SOF_IPC4_##type] = #type
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static const char * const ipc4_dbg_mod_msg_type[] = {
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DBG_IPC4_MSG_TYPE_ENTRY(MOD_INIT_INSTANCE),
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DBG_IPC4_MSG_TYPE_ENTRY(MOD_CONFIG_GET),
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DBG_IPC4_MSG_TYPE_ENTRY(MOD_CONFIG_SET),
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DBG_IPC4_MSG_TYPE_ENTRY(MOD_LARGE_CONFIG_GET),
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DBG_IPC4_MSG_TYPE_ENTRY(MOD_LARGE_CONFIG_SET),
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DBG_IPC4_MSG_TYPE_ENTRY(MOD_BIND),
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DBG_IPC4_MSG_TYPE_ENTRY(MOD_UNBIND),
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DBG_IPC4_MSG_TYPE_ENTRY(MOD_SET_DX),
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DBG_IPC4_MSG_TYPE_ENTRY(MOD_SET_D0IX),
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DBG_IPC4_MSG_TYPE_ENTRY(MOD_ENTER_MODULE_RESTORE),
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DBG_IPC4_MSG_TYPE_ENTRY(MOD_EXIT_MODULE_RESTORE),
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DBG_IPC4_MSG_TYPE_ENTRY(MOD_DELETE_INSTANCE),
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};
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static const char * const ipc4_dbg_glb_msg_type[] = {
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DBG_IPC4_MSG_TYPE_ENTRY(GLB_BOOT_CONFIG),
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DBG_IPC4_MSG_TYPE_ENTRY(GLB_ROM_CONTROL),
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DBG_IPC4_MSG_TYPE_ENTRY(GLB_IPCGATEWAY_CMD),
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DBG_IPC4_MSG_TYPE_ENTRY(GLB_PERF_MEASUREMENTS_CMD),
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DBG_IPC4_MSG_TYPE_ENTRY(GLB_CHAIN_DMA),
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DBG_IPC4_MSG_TYPE_ENTRY(GLB_LOAD_MULTIPLE_MODULES),
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DBG_IPC4_MSG_TYPE_ENTRY(GLB_UNLOAD_MULTIPLE_MODULES),
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DBG_IPC4_MSG_TYPE_ENTRY(GLB_CREATE_PIPELINE),
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DBG_IPC4_MSG_TYPE_ENTRY(GLB_DELETE_PIPELINE),
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DBG_IPC4_MSG_TYPE_ENTRY(GLB_SET_PIPELINE_STATE),
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DBG_IPC4_MSG_TYPE_ENTRY(GLB_GET_PIPELINE_STATE),
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DBG_IPC4_MSG_TYPE_ENTRY(GLB_GET_PIPELINE_CONTEXT_SIZE),
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DBG_IPC4_MSG_TYPE_ENTRY(GLB_SAVE_PIPELINE),
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DBG_IPC4_MSG_TYPE_ENTRY(GLB_RESTORE_PIPELINE),
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DBG_IPC4_MSG_TYPE_ENTRY(GLB_LOAD_LIBRARY),
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DBG_IPC4_MSG_TYPE_ENTRY(GLB_INTERNAL_MESSAGE),
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DBG_IPC4_MSG_TYPE_ENTRY(GLB_NOTIFICATION),
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};
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#define DBG_IPC4_NOTIFICATION_TYPE_ENTRY(type) [SOF_IPC4_NOTIFY_##type] = #type
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static const char * const ipc4_dbg_notification_type[] = {
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DBG_IPC4_NOTIFICATION_TYPE_ENTRY(PHRASE_DETECTED),
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DBG_IPC4_NOTIFICATION_TYPE_ENTRY(RESOURCE_EVENT),
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DBG_IPC4_NOTIFICATION_TYPE_ENTRY(LOG_BUFFER_STATUS),
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DBG_IPC4_NOTIFICATION_TYPE_ENTRY(TIMESTAMP_CAPTURED),
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DBG_IPC4_NOTIFICATION_TYPE_ENTRY(FW_READY),
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DBG_IPC4_NOTIFICATION_TYPE_ENTRY(FW_AUD_CLASS_RESULT),
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DBG_IPC4_NOTIFICATION_TYPE_ENTRY(EXCEPTION_CAUGHT),
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DBG_IPC4_NOTIFICATION_TYPE_ENTRY(MODULE_NOTIFICATION),
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DBG_IPC4_NOTIFICATION_TYPE_ENTRY(PROBE_DATA_AVAILABLE),
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DBG_IPC4_NOTIFICATION_TYPE_ENTRY(ASYNC_MSG_SRVC_MESSAGE),
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};
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static void sof_ipc4_log_header(struct device *dev, u8 *text, struct sof_ipc4_msg *msg,
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bool data_size_valid)
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{
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u32 val, type;
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const u8 *str2 = NULL;
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const u8 *str = NULL;
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val = msg->primary & SOF_IPC4_MSG_TARGET_MASK;
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type = SOF_IPC4_MSG_TYPE_GET(msg->primary);
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if (val == SOF_IPC4_MSG_TARGET(SOF_IPC4_MODULE_MSG)) {
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/* Module message */
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if (type < SOF_IPC4_MOD_TYPE_LAST)
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str = ipc4_dbg_mod_msg_type[type];
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if (!str)
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str = "Unknown Module message type";
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} else {
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/* Global FW message */
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if (type < SOF_IPC4_GLB_TYPE_LAST)
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str = ipc4_dbg_glb_msg_type[type];
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if (!str)
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str = "Unknown Global message type";
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if (type == SOF_IPC4_GLB_NOTIFICATION) {
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/* Notification message */
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u32 notif = SOF_IPC4_NOTIFICATION_TYPE_GET(msg->primary);
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/* Do not print log buffer notification if not desired */
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if (notif == SOF_IPC4_NOTIFY_LOG_BUFFER_STATUS &&
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!sof_debug_check_flag(SOF_DBG_PRINT_DMA_POSITION_UPDATE_LOGS))
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return;
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if (notif < SOF_IPC4_NOTIFY_TYPE_LAST)
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str2 = ipc4_dbg_notification_type[notif];
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if (!str2)
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str2 = "Unknown Global notification";
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}
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}
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if (str2) {
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if (data_size_valid && msg->data_size)
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dev_dbg(dev, "%s: %#x|%#x: %s|%s [data size: %zu]\n",
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text, msg->primary, msg->extension, str, str2,
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msg->data_size);
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else
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dev_dbg(dev, "%s: %#x|%#x: %s|%s\n", text, msg->primary,
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msg->extension, str, str2);
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} else {
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if (data_size_valid && msg->data_size)
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dev_dbg(dev, "%s: %#x|%#x: %s [data size: %zu]\n",
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text, msg->primary, msg->extension, str,
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msg->data_size);
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else
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dev_dbg(dev, "%s: %#x|%#x: %s\n", text, msg->primary,
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msg->extension, str);
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}
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}
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#else /* CONFIG_SND_SOC_SOF_DEBUG_VERBOSE_IPC */
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static void sof_ipc4_log_header(struct device *dev, u8 *text, struct sof_ipc4_msg *msg,
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bool data_size_valid)
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{
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/* Do not print log buffer notification if not desired */
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if (!sof_debug_check_flag(SOF_DBG_PRINT_DMA_POSITION_UPDATE_LOGS) &&
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!SOF_IPC4_MSG_IS_MODULE_MSG(msg->primary) &&
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SOF_IPC4_MSG_TYPE_GET(msg->primary) == SOF_IPC4_GLB_NOTIFICATION &&
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SOF_IPC4_NOTIFICATION_TYPE_GET(msg->primary) == SOF_IPC4_NOTIFY_LOG_BUFFER_STATUS)
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return;
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if (data_size_valid && msg->data_size)
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dev_dbg(dev, "%s: %#x|%#x [data size: %zu]\n", text,
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msg->primary, msg->extension, msg->data_size);
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else
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dev_dbg(dev, "%s: %#x|%#x\n", text, msg->primary, msg->extension);
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}
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#endif
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static void sof_ipc4_dump_payload(struct snd_sof_dev *sdev,
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void *ipc_data, size_t size)
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{
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print_hex_dump_debug("Message payload: ", DUMP_PREFIX_OFFSET,
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16, 4, ipc_data, size, false);
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}
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static int sof_ipc4_get_reply(struct snd_sof_dev *sdev)
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{
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struct snd_sof_ipc_msg *msg = sdev->msg;
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struct sof_ipc4_msg *ipc4_reply;
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int ret;
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/* get the generic reply */
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ipc4_reply = msg->reply_data;
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sof_ipc4_log_header(sdev->dev, "ipc tx reply", ipc4_reply, false);
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ret = sof_ipc4_check_reply_status(sdev, ipc4_reply->primary);
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if (ret)
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return ret;
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/* No other information is expected for non large config get replies */
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if (!msg->reply_size || !SOF_IPC4_MSG_IS_MODULE_MSG(ipc4_reply->primary) ||
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(SOF_IPC4_MSG_TYPE_GET(ipc4_reply->primary) != SOF_IPC4_MOD_LARGE_CONFIG_GET))
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return 0;
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/* Read the requested payload */
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snd_sof_dsp_mailbox_read(sdev, sdev->dsp_box.offset, ipc4_reply->data_ptr,
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msg->reply_size);
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return 0;
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}
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/* wait for IPC message reply */
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static int ipc4_wait_tx_done(struct snd_sof_ipc *ipc, void *reply_data)
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{
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struct snd_sof_ipc_msg *msg = &ipc->msg;
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struct sof_ipc4_msg *ipc4_msg = msg->msg_data;
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struct snd_sof_dev *sdev = ipc->sdev;
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int ret;
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/* wait for DSP IPC completion */
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ret = wait_event_timeout(msg->waitq, msg->ipc_complete,
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msecs_to_jiffies(sdev->ipc_timeout));
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if (ret == 0) {
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dev_err(sdev->dev, "ipc timed out for %#x|%#x\n",
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ipc4_msg->primary, ipc4_msg->extension);
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snd_sof_handle_fw_exception(ipc->sdev, "IPC timeout");
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return -ETIMEDOUT;
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}
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if (msg->reply_error) {
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dev_err(sdev->dev, "ipc error for msg %#x|%#x\n",
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ipc4_msg->primary, ipc4_msg->extension);
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ret = msg->reply_error;
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} else {
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if (reply_data) {
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struct sof_ipc4_msg *ipc4_reply = msg->reply_data;
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struct sof_ipc4_msg *ipc4_reply_data = reply_data;
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/* Copy the header */
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ipc4_reply_data->header_u64 = ipc4_reply->header_u64;
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if (msg->reply_size && ipc4_reply_data->data_ptr) {
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/* copy the payload returned from DSP */
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memcpy(ipc4_reply_data->data_ptr, ipc4_reply->data_ptr,
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msg->reply_size);
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ipc4_reply_data->data_size = msg->reply_size;
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}
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}
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ret = 0;
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sof_ipc4_log_header(sdev->dev, "ipc tx done ", ipc4_msg, true);
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}
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/* re-enable dumps after successful IPC tx */
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if (sdev->ipc_dump_printed) {
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sdev->dbg_dump_printed = false;
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sdev->ipc_dump_printed = false;
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}
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return ret;
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}
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static int ipc4_tx_msg_unlocked(struct snd_sof_ipc *ipc,
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void *msg_data, size_t msg_bytes,
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void *reply_data, size_t reply_bytes)
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{
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struct sof_ipc4_msg *ipc4_msg = msg_data;
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struct snd_sof_dev *sdev = ipc->sdev;
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int ret;
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if (msg_bytes > ipc->max_payload_size || reply_bytes > ipc->max_payload_size)
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return -EINVAL;
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sof_ipc4_log_header(sdev->dev, "ipc tx ", msg_data, true);
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ret = sof_ipc_send_msg(sdev, msg_data, msg_bytes, reply_bytes);
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if (ret) {
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dev_err_ratelimited(sdev->dev,
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"%s: ipc message send for %#x|%#x failed: %d\n",
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__func__, ipc4_msg->primary, ipc4_msg->extension, ret);
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return ret;
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}
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/* now wait for completion */
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return ipc4_wait_tx_done(ipc, reply_data);
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}
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|
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static int sof_ipc4_tx_msg(struct snd_sof_dev *sdev, void *msg_data, size_t msg_bytes,
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void *reply_data, size_t reply_bytes, bool no_pm)
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{
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struct snd_sof_ipc *ipc = sdev->ipc;
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int ret;
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if (!msg_data)
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return -EINVAL;
|
|
|
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if (!no_pm) {
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const struct sof_dsp_power_state target_state = {
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.state = SOF_DSP_PM_D0,
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};
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/* ensure the DSP is in D0i0 before sending a new IPC */
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ret = snd_sof_dsp_set_power_state(sdev, &target_state);
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if (ret < 0)
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return ret;
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}
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|
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/* Serialise IPC TX */
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mutex_lock(&ipc->tx_mutex);
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ret = ipc4_tx_msg_unlocked(ipc, msg_data, msg_bytes, reply_data, reply_bytes);
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if (sof_debug_check_flag(SOF_DBG_DUMP_IPC_MESSAGE_PAYLOAD)) {
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struct sof_ipc4_msg *msg = NULL;
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/* payload is indicated by non zero msg/reply_bytes */
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if (msg_bytes)
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msg = msg_data;
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else if (reply_bytes)
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msg = reply_data;
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if (msg)
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sof_ipc4_dump_payload(sdev, msg->data_ptr, msg->data_size);
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}
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mutex_unlock(&ipc->tx_mutex);
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return ret;
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}
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|
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static int sof_ipc4_set_get_data(struct snd_sof_dev *sdev, void *data,
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size_t payload_bytes, bool set)
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{
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const struct sof_dsp_power_state target_state = {
|
|
.state = SOF_DSP_PM_D0,
|
|
};
|
|
size_t payload_limit = sdev->ipc->max_payload_size;
|
|
struct sof_ipc4_msg *ipc4_msg = data;
|
|
struct sof_ipc4_msg tx = {{ 0 }};
|
|
struct sof_ipc4_msg rx = {{ 0 }};
|
|
size_t remaining = payload_bytes;
|
|
size_t offset = 0;
|
|
size_t chunk_size;
|
|
int ret;
|
|
|
|
if (!data)
|
|
return -EINVAL;
|
|
|
|
if ((ipc4_msg->primary & SOF_IPC4_MSG_TARGET_MASK) !=
|
|
SOF_IPC4_MSG_TARGET(SOF_IPC4_MODULE_MSG))
|
|
return -EINVAL;
|
|
|
|
ipc4_msg->primary &= ~SOF_IPC4_MSG_TYPE_MASK;
|
|
tx.primary = ipc4_msg->primary;
|
|
tx.extension = ipc4_msg->extension;
|
|
|
|
if (set)
|
|
tx.primary |= SOF_IPC4_MSG_TYPE_SET(SOF_IPC4_MOD_LARGE_CONFIG_SET);
|
|
else
|
|
tx.primary |= SOF_IPC4_MSG_TYPE_SET(SOF_IPC4_MOD_LARGE_CONFIG_GET);
|
|
|
|
tx.extension &= ~SOF_IPC4_MOD_EXT_MSG_SIZE_MASK;
|
|
tx.extension |= SOF_IPC4_MOD_EXT_MSG_SIZE(payload_bytes);
|
|
|
|
tx.extension |= SOF_IPC4_MOD_EXT_MSG_FIRST_BLOCK(1);
|
|
|
|
/* ensure the DSP is in D0i0 before sending IPC */
|
|
ret = snd_sof_dsp_set_power_state(sdev, &target_state);
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
/* Serialise IPC TX */
|
|
mutex_lock(&sdev->ipc->tx_mutex);
|
|
|
|
do {
|
|
size_t tx_size, rx_size;
|
|
|
|
if (remaining > payload_limit) {
|
|
chunk_size = payload_limit;
|
|
} else {
|
|
chunk_size = remaining;
|
|
if (set)
|
|
tx.extension |= SOF_IPC4_MOD_EXT_MSG_LAST_BLOCK(1);
|
|
}
|
|
|
|
if (offset) {
|
|
tx.extension &= ~SOF_IPC4_MOD_EXT_MSG_FIRST_BLOCK_MASK;
|
|
tx.extension &= ~SOF_IPC4_MOD_EXT_MSG_SIZE_MASK;
|
|
tx.extension |= SOF_IPC4_MOD_EXT_MSG_SIZE(offset);
|
|
}
|
|
|
|
if (set) {
|
|
tx.data_size = chunk_size;
|
|
tx.data_ptr = ipc4_msg->data_ptr + offset;
|
|
|
|
tx_size = chunk_size;
|
|
rx_size = 0;
|
|
} else {
|
|
rx.primary = 0;
|
|
rx.extension = 0;
|
|
rx.data_size = chunk_size;
|
|
rx.data_ptr = ipc4_msg->data_ptr + offset;
|
|
|
|
tx_size = 0;
|
|
rx_size = chunk_size;
|
|
}
|
|
|
|
/* Send the message for the current chunk */
|
|
ret = ipc4_tx_msg_unlocked(sdev->ipc, &tx, tx_size, &rx, rx_size);
|
|
if (ret < 0) {
|
|
dev_err(sdev->dev,
|
|
"%s: large config %s failed at offset %zu: %d\n",
|
|
__func__, set ? "set" : "get", offset, ret);
|
|
goto out;
|
|
}
|
|
|
|
if (!set && rx.extension & SOF_IPC4_MOD_EXT_MSG_FIRST_BLOCK_MASK) {
|
|
/* Verify the firmware reported total payload size */
|
|
rx_size = rx.extension & SOF_IPC4_MOD_EXT_MSG_SIZE_MASK;
|
|
|
|
if (rx_size > payload_bytes) {
|
|
dev_err(sdev->dev,
|
|
"%s: Receive buffer (%zu) is too small for %zu\n",
|
|
__func__, payload_bytes, rx_size);
|
|
ret = -ENOMEM;
|
|
goto out;
|
|
}
|
|
|
|
if (rx_size < chunk_size) {
|
|
chunk_size = rx_size;
|
|
remaining = rx_size;
|
|
} else if (rx_size < payload_bytes) {
|
|
remaining = rx_size;
|
|
}
|
|
}
|
|
|
|
offset += chunk_size;
|
|
remaining -= chunk_size;
|
|
} while (remaining);
|
|
|
|
/* Adjust the received data size if needed */
|
|
if (!set && payload_bytes != offset)
|
|
ipc4_msg->data_size = offset;
|
|
|
|
if (sof_debug_check_flag(SOF_DBG_DUMP_IPC_MESSAGE_PAYLOAD))
|
|
sof_ipc4_dump_payload(sdev, ipc4_msg->data_ptr, ipc4_msg->data_size);
|
|
|
|
out:
|
|
mutex_unlock(&sdev->ipc->tx_mutex);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int sof_ipc4_init_msg_memory(struct snd_sof_dev *sdev)
|
|
{
|
|
struct sof_ipc4_msg *ipc4_msg;
|
|
struct snd_sof_ipc_msg *msg = &sdev->ipc->msg;
|
|
|
|
/* TODO: get max_payload_size from firmware */
|
|
sdev->ipc->max_payload_size = SOF_IPC4_MSG_MAX_SIZE;
|
|
|
|
/* Allocate memory for the ipc4 container and the maximum payload */
|
|
msg->reply_data = devm_kzalloc(sdev->dev, sdev->ipc->max_payload_size +
|
|
sizeof(struct sof_ipc4_msg), GFP_KERNEL);
|
|
if (!msg->reply_data)
|
|
return -ENOMEM;
|
|
|
|
ipc4_msg = msg->reply_data;
|
|
ipc4_msg->data_ptr = msg->reply_data + sizeof(struct sof_ipc4_msg);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int ipc4_fw_ready(struct snd_sof_dev *sdev, struct sof_ipc4_msg *ipc4_msg)
|
|
{
|
|
int inbox_offset, inbox_size, outbox_offset, outbox_size;
|
|
|
|
/* no need to re-check version/ABI for subsequent boots */
|
|
if (!sdev->first_boot)
|
|
return 0;
|
|
|
|
/* Set up the windows for IPC communication */
|
|
inbox_offset = snd_sof_dsp_get_mailbox_offset(sdev);
|
|
if (inbox_offset < 0) {
|
|
dev_err(sdev->dev, "%s: No mailbox offset\n", __func__);
|
|
return inbox_offset;
|
|
}
|
|
inbox_size = SOF_IPC4_MSG_MAX_SIZE;
|
|
outbox_offset = snd_sof_dsp_get_window_offset(sdev, SOF_IPC4_OUTBOX_WINDOW_IDX);
|
|
outbox_size = SOF_IPC4_MSG_MAX_SIZE;
|
|
|
|
sdev->fw_info_box.offset = snd_sof_dsp_get_window_offset(sdev, SOF_IPC4_INBOX_WINDOW_IDX);
|
|
sdev->fw_info_box.size = sizeof(struct sof_ipc4_fw_registers);
|
|
sdev->dsp_box.offset = inbox_offset;
|
|
sdev->dsp_box.size = inbox_size;
|
|
sdev->host_box.offset = outbox_offset;
|
|
sdev->host_box.size = outbox_size;
|
|
|
|
sdev->debug_box.offset = snd_sof_dsp_get_window_offset(sdev,
|
|
SOF_IPC4_DEBUG_WINDOW_IDX);
|
|
|
|
dev_dbg(sdev->dev, "mailbox upstream 0x%x - size 0x%x\n",
|
|
inbox_offset, inbox_size);
|
|
dev_dbg(sdev->dev, "mailbox downstream 0x%x - size 0x%x\n",
|
|
outbox_offset, outbox_size);
|
|
dev_dbg(sdev->dev, "debug box 0x%x\n", sdev->debug_box.offset);
|
|
|
|
return sof_ipc4_init_msg_memory(sdev);
|
|
}
|
|
|
|
static void sof_ipc4_rx_msg(struct snd_sof_dev *sdev)
|
|
{
|
|
struct sof_ipc4_msg *ipc4_msg = sdev->ipc->msg.rx_data;
|
|
size_t data_size = 0;
|
|
int err;
|
|
|
|
if (!ipc4_msg || !SOF_IPC4_MSG_IS_NOTIFICATION(ipc4_msg->primary))
|
|
return;
|
|
|
|
ipc4_msg->data_ptr = NULL;
|
|
ipc4_msg->data_size = 0;
|
|
|
|
sof_ipc4_log_header(sdev->dev, "ipc rx ", ipc4_msg, false);
|
|
|
|
switch (SOF_IPC4_NOTIFICATION_TYPE_GET(ipc4_msg->primary)) {
|
|
case SOF_IPC4_NOTIFY_FW_READY:
|
|
/* check for FW boot completion */
|
|
if (sdev->fw_state == SOF_FW_BOOT_IN_PROGRESS) {
|
|
err = ipc4_fw_ready(sdev, ipc4_msg);
|
|
if (err < 0)
|
|
sof_set_fw_state(sdev, SOF_FW_BOOT_READY_FAILED);
|
|
else
|
|
sof_set_fw_state(sdev, SOF_FW_BOOT_READY_OK);
|
|
|
|
/* wake up firmware loader */
|
|
wake_up(&sdev->boot_wait);
|
|
}
|
|
|
|
break;
|
|
case SOF_IPC4_NOTIFY_RESOURCE_EVENT:
|
|
data_size = sizeof(struct sof_ipc4_notify_resource_data);
|
|
break;
|
|
case SOF_IPC4_NOTIFY_LOG_BUFFER_STATUS:
|
|
sof_ipc4_mtrace_update_pos(sdev, SOF_IPC4_LOG_CORE_GET(ipc4_msg->primary));
|
|
break;
|
|
default:
|
|
dev_dbg(sdev->dev, "Unhandled DSP message: %#x|%#x\n",
|
|
ipc4_msg->primary, ipc4_msg->extension);
|
|
break;
|
|
}
|
|
|
|
if (data_size) {
|
|
ipc4_msg->data_ptr = kmalloc(data_size, GFP_KERNEL);
|
|
if (!ipc4_msg->data_ptr)
|
|
return;
|
|
|
|
ipc4_msg->data_size = data_size;
|
|
snd_sof_ipc_msg_data(sdev, NULL, ipc4_msg->data_ptr, ipc4_msg->data_size);
|
|
}
|
|
|
|
sof_ipc4_log_header(sdev->dev, "ipc rx done ", ipc4_msg, true);
|
|
|
|
if (data_size) {
|
|
kfree(ipc4_msg->data_ptr);
|
|
ipc4_msg->data_ptr = NULL;
|
|
ipc4_msg->data_size = 0;
|
|
}
|
|
}
|
|
|
|
static int sof_ipc4_set_core_state(struct snd_sof_dev *sdev, int core_idx, bool on)
|
|
{
|
|
struct sof_ipc4_dx_state_info dx_state;
|
|
struct sof_ipc4_msg msg;
|
|
|
|
dx_state.core_mask = BIT(core_idx);
|
|
if (on)
|
|
dx_state.dx_mask = BIT(core_idx);
|
|
else
|
|
dx_state.dx_mask = 0;
|
|
|
|
msg.primary = SOF_IPC4_MSG_TYPE_SET(SOF_IPC4_MOD_SET_DX);
|
|
msg.primary |= SOF_IPC4_MSG_DIR(SOF_IPC4_MSG_REQUEST);
|
|
msg.primary |= SOF_IPC4_MSG_TARGET(SOF_IPC4_MODULE_MSG);
|
|
msg.extension = 0;
|
|
msg.data_ptr = &dx_state;
|
|
msg.data_size = sizeof(dx_state);
|
|
|
|
return sof_ipc4_tx_msg(sdev, &msg, msg.data_size, NULL, 0, false);
|
|
}
|
|
|
|
/*
|
|
* The context save callback is used to send a message to the firmware notifying
|
|
* it that the primary core is going to be turned off, which is used as an
|
|
* indication to prepare for a full power down, thus preparing for IMR boot
|
|
* (when supported)
|
|
*
|
|
* Note: in IPC4 there is no message used to restore context, thus no context
|
|
* restore callback is implemented
|
|
*/
|
|
static int sof_ipc4_ctx_save(struct snd_sof_dev *sdev)
|
|
{
|
|
return sof_ipc4_set_core_state(sdev, SOF_DSP_PRIMARY_CORE, false);
|
|
}
|
|
|
|
static int sof_ipc4_set_pm_gate(struct snd_sof_dev *sdev, u32 flags)
|
|
{
|
|
struct sof_ipc4_msg msg = {{0}};
|
|
|
|
msg.primary = SOF_IPC4_MSG_TYPE_SET(SOF_IPC4_MOD_SET_D0IX);
|
|
msg.primary |= SOF_IPC4_MSG_DIR(SOF_IPC4_MSG_REQUEST);
|
|
msg.primary |= SOF_IPC4_MSG_TARGET(SOF_IPC4_MODULE_MSG);
|
|
msg.extension = flags;
|
|
|
|
return sof_ipc4_tx_msg(sdev, &msg, 0, NULL, 0, true);
|
|
}
|
|
|
|
static const struct sof_ipc_pm_ops ipc4_pm_ops = {
|
|
.ctx_save = sof_ipc4_ctx_save,
|
|
.set_core_state = sof_ipc4_set_core_state,
|
|
.set_pm_gate = sof_ipc4_set_pm_gate,
|
|
};
|
|
|
|
static int sof_ipc4_init(struct snd_sof_dev *sdev)
|
|
{
|
|
struct sof_ipc4_fw_data *ipc4_data = sdev->private;
|
|
|
|
mutex_init(&ipc4_data->pipeline_state_mutex);
|
|
|
|
xa_init_flags(&ipc4_data->fw_lib_xa, XA_FLAGS_ALLOC);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static void sof_ipc4_exit(struct snd_sof_dev *sdev)
|
|
{
|
|
struct sof_ipc4_fw_data *ipc4_data = sdev->private;
|
|
struct sof_ipc4_fw_library *fw_lib;
|
|
unsigned long lib_id;
|
|
|
|
xa_for_each(&ipc4_data->fw_lib_xa, lib_id, fw_lib) {
|
|
/*
|
|
* The basefw (ID == 0) is handled by generic code, it is not
|
|
* loaded by IPC4 code.
|
|
*/
|
|
if (lib_id != 0)
|
|
release_firmware(fw_lib->sof_fw.fw);
|
|
|
|
fw_lib->sof_fw.fw = NULL;
|
|
}
|
|
|
|
xa_destroy(&ipc4_data->fw_lib_xa);
|
|
}
|
|
|
|
static int sof_ipc4_post_boot(struct snd_sof_dev *sdev)
|
|
{
|
|
if (sdev->first_boot)
|
|
return sof_ipc4_query_fw_configuration(sdev);
|
|
|
|
return sof_ipc4_reload_fw_libraries(sdev);
|
|
}
|
|
|
|
const struct sof_ipc_ops ipc4_ops = {
|
|
.init = sof_ipc4_init,
|
|
.exit = sof_ipc4_exit,
|
|
.post_fw_boot = sof_ipc4_post_boot,
|
|
.tx_msg = sof_ipc4_tx_msg,
|
|
.rx_msg = sof_ipc4_rx_msg,
|
|
.set_get_data = sof_ipc4_set_get_data,
|
|
.get_reply = sof_ipc4_get_reply,
|
|
.pm = &ipc4_pm_ops,
|
|
.fw_loader = &ipc4_loader_ops,
|
|
.tplg = &ipc4_tplg_ops,
|
|
.pcm = &ipc4_pcm_ops,
|
|
.fw_tracing = &ipc4_mtrace_ops,
|
|
};
|