8d2e630899
The reasoning behind our code taking two paths depending upon whether or
not we may have been configured for IOMMU isn't clear to me. It should
always be safe to use the pci mapping functions as they are designed to
abstract the decision we were handling in i915.
Aside from simpler code, removing another member for the intel_gtt
struct is a nice motivation.
I ran this by Chris, and he wasn't concerned about the extra kzalloc,
and memory references vs. page_to_phys calculation in the case without
IOMMU.
v2: Update commit message
v3: Remove needs_dmar addition from Zhenyu upstream
This reverts (and then other stuff)
commit 20652097da
Author: Zhenyu Wang <zhenyuw@linux.intel.com>
Date: Thu Dec 13 23:47:47 2012 +0800
drm/i915: Fix missed needs_dmar setting
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com> (v2)
Cc: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
[danvet: Squash in follow-up fix to remove the bogus hunk which
deleted the dma_mask configuration for gen6+.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
42 lines
1.1 KiB
C
42 lines
1.1 KiB
C
/* Common header for intel-gtt.ko and i915.ko */
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#ifndef _DRM_INTEL_GTT_H
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#define _DRM_INTEL_GTT_H
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struct intel_gtt {
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/* Size of memory reserved for graphics by the BIOS */
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unsigned int stolen_size;
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/* Total number of gtt entries. */
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unsigned int gtt_total_entries;
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/* Part of the gtt that is mappable by the cpu, for those chips where
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* this is not the full gtt. */
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unsigned int gtt_mappable_entries;
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/* needed for ioremap in drm/i915 */
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phys_addr_t gma_bus_addr;
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} *intel_gtt_get(void);
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int intel_gmch_probe(struct pci_dev *bridge_pdev, struct pci_dev *gpu_pdev,
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struct agp_bridge_data *bridge);
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void intel_gmch_remove(void);
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bool intel_enable_gtt(void);
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void intel_gtt_chipset_flush(void);
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void intel_gtt_insert_sg_entries(struct sg_table *st,
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unsigned int pg_start,
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unsigned int flags);
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void intel_gtt_clear_range(unsigned int first_entry, unsigned int num_entries);
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/* Special gtt memory types */
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#define AGP_DCACHE_MEMORY 1
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#define AGP_PHYS_MEMORY 2
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/* flag for GFDT type */
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#define AGP_USER_CACHED_MEMORY_GFDT (1 << 3)
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#ifdef CONFIG_INTEL_IOMMU
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extern int intel_iommu_gfx_mapped;
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#endif
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#endif
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