linux/drivers/cxl
Dan Williams 8d48817df6 cxl/region: Add region driver boiler plate
The CXL region driver is responsible for routing fully formed CXL
regions to one of libnvdimm, for persistent memory regions, device-dax
for volatile memory regions, or just act as an enumeration placeholder
if the region was setup and configuration locked by platform firmware.
In the platform-firmware-setup case the expectation is that region is
already accounted in the system memory map, i.e. already enabled as
"System RAM".

For now, just attach to CXL regions in the CXL_CONFIG_COMMIT state, and
take no further action.

Given this driver is just a small / simple router, include it in the
core rather than its own module.

Co-developed-by: Ben Widawsky <bwidawsk@kernel.org>
Signed-off-by: Ben Widawsky <bwidawsk@kernel.org>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Link: https://lore.kernel.org/r/20220624041950.559155-18-dan.j.williams@intel.com
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
2022-07-26 12:23:01 -07:00
..
core cxl/region: Add region driver boiler plate 2022-07-26 12:23:01 -07:00
acpi.c cxl/port: Record parent dport when adding ports 2022-07-21 17:19:24 -07:00
cxl.h cxl/region: Add region driver boiler plate 2022-07-26 12:23:01 -07:00
cxlmem.h cxl/region: Attach endpoint decoders 2022-07-25 12:18:07 -07:00
cxlpci.h cxl/port: Read CDAT table 2022-07-19 15:38:05 -07:00
Kconfig cxl/region: Allocate HPA capacity to regions 2022-07-25 12:18:06 -07:00
Makefile PM: CXL: Disable suspend 2022-04-22 16:09:42 -07:00
mem.c cxl/mem: Enumerate port targets before adding endpoints 2022-07-21 17:19:25 -07:00
pci.c cxl/pci: Create PCI DOE mailbox's for memory devices 2022-07-19 15:38:04 -07:00
pmem.c cxl/mbox: Use __le32 in get,set_lsa mailbox structures 2022-06-21 14:09:00 -07:00
port.c cxl/port: Read CDAT table 2022-07-19 15:38:05 -07:00