Rename struct dma_buf_map to struct iosys_map and corresponding APIs. Over time dma-buf-map grew up to more functionality than the one used by dma-buf: in fact it's just a shim layer to abstract system memory, that can be accessed via regular load and store, from IO memory that needs to be acessed via arch helpers. The idea is to extend this API so it can fulfill other needs, internal to a single driver. Example: in the i915 driver it's desired to share the implementation for integrated graphics, which uses mostly system memory, with discrete graphics, which may need to access IO memory. The conversion was mostly done with the following semantic patch: @r1@ @@ - struct dma_buf_map + struct iosys_map @r2@ @@ ( - DMA_BUF_MAP_INIT_VADDR + IOSYS_MAP_INIT_VADDR | - dma_buf_map_set_vaddr + iosys_map_set_vaddr | - dma_buf_map_set_vaddr_iomem + iosys_map_set_vaddr_iomem | - dma_buf_map_is_equal + iosys_map_is_equal | - dma_buf_map_is_null + iosys_map_is_null | - dma_buf_map_is_set + iosys_map_is_set | - dma_buf_map_clear + iosys_map_clear | - dma_buf_map_memcpy_to + iosys_map_memcpy_to | - dma_buf_map_incr + iosys_map_incr ) @@ @@ - #include <linux/dma-buf-map.h> + #include <linux/iosys-map.h> Then some files had their includes adjusted and some comments were update to remove mentions to dma-buf-map. Since this is not specific to dma-buf anymore, move the documentation to the "Bus-Independent Device Accesses" section. v2: - Squash patches v3: - Fix wrong removal of dma-buf.h from MAINTAINERS - Move documentation from dma-buf.rst to device-io.rst v4: - Change documentation title and level Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com> Acked-by: Christian König <christian.koenig@amd.com> Acked-by: Sumit Semwal <sumit.semwal@linaro.org> Acked-by: Thomas Zimmermann <tzimmermann@suse.de> Link: https://patchwork.freedesktop.org/patch/msgid/20220204170541.829227-1-lucas.demarchi@intel.com
356 lines
9.1 KiB
C
356 lines
9.1 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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#include <linux/crc32.h>
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#include <drm/drm_atomic.h>
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#include <drm/drm_atomic_helper.h>
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#include <drm/drm_fourcc.h>
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#include <drm/drm_gem_framebuffer_helper.h>
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#include <drm/drm_vblank.h>
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#include "vkms_drv.h"
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static u32 get_pixel_from_buffer(int x, int y, const u8 *buffer,
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const struct vkms_composer *composer)
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{
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u32 pixel;
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int src_offset = composer->offset + (y * composer->pitch)
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+ (x * composer->cpp);
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pixel = *(u32 *)&buffer[src_offset];
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return pixel;
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}
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/**
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* compute_crc - Compute CRC value on output frame
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*
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* @vaddr: address to final framebuffer
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* @composer: framebuffer's metadata
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*
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* returns CRC value computed using crc32 on the visible portion of
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* the final framebuffer at vaddr_out
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*/
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static uint32_t compute_crc(const u8 *vaddr,
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const struct vkms_composer *composer)
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{
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int x, y;
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u32 crc = 0, pixel = 0;
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int x_src = composer->src.x1 >> 16;
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int y_src = composer->src.y1 >> 16;
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int h_src = drm_rect_height(&composer->src) >> 16;
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int w_src = drm_rect_width(&composer->src) >> 16;
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for (y = y_src; y < y_src + h_src; ++y) {
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for (x = x_src; x < x_src + w_src; ++x) {
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pixel = get_pixel_from_buffer(x, y, vaddr, composer);
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crc = crc32_le(crc, (void *)&pixel, sizeof(u32));
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}
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}
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return crc;
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}
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static u8 blend_channel(u8 src, u8 dst, u8 alpha)
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{
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u32 pre_blend;
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u8 new_color;
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pre_blend = (src * 255 + dst * (255 - alpha));
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/* Faster div by 255 */
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new_color = ((pre_blend + ((pre_blend + 257) >> 8)) >> 8);
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return new_color;
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}
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/**
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* alpha_blend - alpha blending equation
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* @argb_src: src pixel on premultiplied alpha mode
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* @argb_dst: dst pixel completely opaque
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*
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* blend pixels using premultiplied blend formula. The current DRM assumption
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* is that pixel color values have been already pre-multiplied with the alpha
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* channel values. See more drm_plane_create_blend_mode_property(). Also, this
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* formula assumes a completely opaque background.
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*/
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static void alpha_blend(const u8 *argb_src, u8 *argb_dst)
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{
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u8 alpha;
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alpha = argb_src[3];
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argb_dst[0] = blend_channel(argb_src[0], argb_dst[0], alpha);
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argb_dst[1] = blend_channel(argb_src[1], argb_dst[1], alpha);
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argb_dst[2] = blend_channel(argb_src[2], argb_dst[2], alpha);
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}
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/**
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* x_blend - blending equation that ignores the pixel alpha
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*
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* overwrites RGB color value from src pixel to dst pixel.
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*/
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static void x_blend(const u8 *xrgb_src, u8 *xrgb_dst)
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{
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memcpy(xrgb_dst, xrgb_src, sizeof(u8) * 3);
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}
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/**
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* blend - blend value at vaddr_src with value at vaddr_dst
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* @vaddr_dst: destination address
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* @vaddr_src: source address
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* @dst_composer: destination framebuffer's metadata
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* @src_composer: source framebuffer's metadata
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* @pixel_blend: blending equation based on plane format
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*
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* Blend the vaddr_src value with the vaddr_dst value using a pixel blend
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* equation according to the supported plane formats DRM_FORMAT_(A/XRGB8888)
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* and clearing alpha channel to an completely opaque background. This function
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* uses buffer's metadata to locate the new composite values at vaddr_dst.
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*
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* TODO: completely clear the primary plane (a = 0xff) before starting to blend
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* pixel color values
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*/
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static void blend(void *vaddr_dst, void *vaddr_src,
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struct vkms_composer *dst_composer,
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struct vkms_composer *src_composer,
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void (*pixel_blend)(const u8 *, u8 *))
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{
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int i, j, j_dst, i_dst;
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int offset_src, offset_dst;
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u8 *pixel_dst, *pixel_src;
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int x_src = src_composer->src.x1 >> 16;
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int y_src = src_composer->src.y1 >> 16;
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int x_dst = src_composer->dst.x1;
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int y_dst = src_composer->dst.y1;
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int h_dst = drm_rect_height(&src_composer->dst);
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int w_dst = drm_rect_width(&src_composer->dst);
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int y_limit = y_src + h_dst;
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int x_limit = x_src + w_dst;
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for (i = y_src, i_dst = y_dst; i < y_limit; ++i) {
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for (j = x_src, j_dst = x_dst; j < x_limit; ++j) {
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offset_dst = dst_composer->offset
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+ (i_dst * dst_composer->pitch)
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+ (j_dst++ * dst_composer->cpp);
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offset_src = src_composer->offset
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+ (i * src_composer->pitch)
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+ (j * src_composer->cpp);
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pixel_src = (u8 *)(vaddr_src + offset_src);
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pixel_dst = (u8 *)(vaddr_dst + offset_dst);
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pixel_blend(pixel_src, pixel_dst);
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/* clearing alpha channel (0xff)*/
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pixel_dst[3] = 0xff;
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}
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i_dst++;
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}
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}
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static void compose_plane(struct vkms_composer *primary_composer,
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struct vkms_composer *plane_composer,
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void *vaddr_out)
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{
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struct drm_framebuffer *fb = &plane_composer->fb;
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void *vaddr;
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void (*pixel_blend)(const u8 *p_src, u8 *p_dst);
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if (WARN_ON(iosys_map_is_null(&primary_composer->map[0])))
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return;
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vaddr = plane_composer->map[0].vaddr;
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if (fb->format->format == DRM_FORMAT_ARGB8888)
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pixel_blend = &alpha_blend;
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else
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pixel_blend = &x_blend;
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blend(vaddr_out, vaddr, primary_composer, plane_composer, pixel_blend);
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}
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static int compose_active_planes(void **vaddr_out,
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struct vkms_composer *primary_composer,
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struct vkms_crtc_state *crtc_state)
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{
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struct drm_framebuffer *fb = &primary_composer->fb;
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struct drm_gem_object *gem_obj = drm_gem_fb_get_obj(fb, 0);
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const void *vaddr;
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int i;
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if (!*vaddr_out) {
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*vaddr_out = kzalloc(gem_obj->size, GFP_KERNEL);
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if (!*vaddr_out) {
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DRM_ERROR("Cannot allocate memory for output frame.");
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return -ENOMEM;
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}
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}
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if (WARN_ON(iosys_map_is_null(&primary_composer->map[0])))
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return -EINVAL;
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vaddr = primary_composer->map[0].vaddr;
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memcpy(*vaddr_out, vaddr, gem_obj->size);
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/* If there are other planes besides primary, we consider the active
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* planes should be in z-order and compose them associatively:
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* ((primary <- overlay) <- cursor)
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*/
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for (i = 1; i < crtc_state->num_active_planes; i++)
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compose_plane(primary_composer,
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crtc_state->active_planes[i]->composer,
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*vaddr_out);
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return 0;
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}
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/**
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* vkms_composer_worker - ordered work_struct to compute CRC
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*
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* @work: work_struct
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*
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* Work handler for composing and computing CRCs. work_struct scheduled in
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* an ordered workqueue that's periodically scheduled to run by
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* _vblank_handle() and flushed at vkms_atomic_crtc_destroy_state().
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*/
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void vkms_composer_worker(struct work_struct *work)
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{
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struct vkms_crtc_state *crtc_state = container_of(work,
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struct vkms_crtc_state,
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composer_work);
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struct drm_crtc *crtc = crtc_state->base.crtc;
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struct vkms_output *out = drm_crtc_to_vkms_output(crtc);
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struct vkms_composer *primary_composer = NULL;
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struct vkms_plane_state *act_plane = NULL;
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bool crc_pending, wb_pending;
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void *vaddr_out = NULL;
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u32 crc32 = 0;
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u64 frame_start, frame_end;
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int ret;
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spin_lock_irq(&out->composer_lock);
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frame_start = crtc_state->frame_start;
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frame_end = crtc_state->frame_end;
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crc_pending = crtc_state->crc_pending;
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wb_pending = crtc_state->wb_pending;
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crtc_state->frame_start = 0;
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crtc_state->frame_end = 0;
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crtc_state->crc_pending = false;
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spin_unlock_irq(&out->composer_lock);
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/*
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* We raced with the vblank hrtimer and previous work already computed
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* the crc, nothing to do.
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*/
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if (!crc_pending)
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return;
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if (crtc_state->num_active_planes >= 1) {
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act_plane = crtc_state->active_planes[0];
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if (act_plane->base.base.plane->type == DRM_PLANE_TYPE_PRIMARY)
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primary_composer = act_plane->composer;
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}
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if (!primary_composer)
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return;
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if (wb_pending)
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vaddr_out = crtc_state->active_writeback->data[0].vaddr;
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ret = compose_active_planes(&vaddr_out, primary_composer,
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crtc_state);
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if (ret) {
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if (ret == -EINVAL && !wb_pending)
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kfree(vaddr_out);
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return;
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}
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crc32 = compute_crc(vaddr_out, primary_composer);
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if (wb_pending) {
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drm_writeback_signal_completion(&out->wb_connector, 0);
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spin_lock_irq(&out->composer_lock);
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crtc_state->wb_pending = false;
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spin_unlock_irq(&out->composer_lock);
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} else {
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kfree(vaddr_out);
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}
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/*
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* The worker can fall behind the vblank hrtimer, make sure we catch up.
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*/
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while (frame_start <= frame_end)
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drm_crtc_add_crc_entry(crtc, true, frame_start++, &crc32);
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}
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static const char * const pipe_crc_sources[] = {"auto"};
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const char *const *vkms_get_crc_sources(struct drm_crtc *crtc,
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size_t *count)
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{
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*count = ARRAY_SIZE(pipe_crc_sources);
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return pipe_crc_sources;
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}
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static int vkms_crc_parse_source(const char *src_name, bool *enabled)
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{
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int ret = 0;
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if (!src_name) {
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*enabled = false;
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} else if (strcmp(src_name, "auto") == 0) {
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*enabled = true;
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} else {
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*enabled = false;
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ret = -EINVAL;
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}
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return ret;
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}
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int vkms_verify_crc_source(struct drm_crtc *crtc, const char *src_name,
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size_t *values_cnt)
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{
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bool enabled;
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if (vkms_crc_parse_source(src_name, &enabled) < 0) {
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DRM_DEBUG_DRIVER("unknown source %s\n", src_name);
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return -EINVAL;
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}
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*values_cnt = 1;
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return 0;
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}
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void vkms_set_composer(struct vkms_output *out, bool enabled)
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{
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bool old_enabled;
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if (enabled)
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drm_crtc_vblank_get(&out->crtc);
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spin_lock_irq(&out->lock);
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old_enabled = out->composer_enabled;
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out->composer_enabled = enabled;
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spin_unlock_irq(&out->lock);
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if (old_enabled)
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drm_crtc_vblank_put(&out->crtc);
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}
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int vkms_set_crc_source(struct drm_crtc *crtc, const char *src_name)
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{
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struct vkms_output *out = drm_crtc_to_vkms_output(crtc);
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bool enabled = false;
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int ret = 0;
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ret = vkms_crc_parse_source(src_name, &enabled);
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vkms_set_composer(out, enabled);
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return ret;
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}
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