Jisheng Zhang 8e396880a8 riscv: dts: add initial T-HEAD TH1520 SoC device tree ...

Add initial device tree for the TH1520 RISC-V SoC by T-HEAD.

Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>

2023-06-17 19:04:08 +01:00

..

allwinner

riscv: dts: allwinner: d1: Switch dma-names order for snps,dw-apb-uart nodes

2023-04-08 14:34:29 +02:00

canaan

riscv: dts: canaan: drop invalid spi-max-frequency

2023-03-26 23:58:27 +01:00

microchip

riscv: dts: microchip: fix the mpfs' mailbox regs

2023-03-15 14:43:48 +00:00

renesas

riscv: dts: renesas: rzfive-smarc-som: Drop PHY interrupt support for ETH{0,1}

2023-01-26 16:02:16 +01:00

sifive

SoC: DT changes for 6.3

2023-02-20 15:49:56 -08:00

starfive

riscv: dts: starfive: Add StarFive JH7110 VisionFive 2 board device tree

2023-04-05 15:50:36 +01:00

thead

riscv: dts: add initial T-HEAD TH1520 SoC device tree

2023-06-17 19:04:08 +01:00

Makefile

riscv: dts: allwinner: Add MangoPi MQ devicetree

2023-01-27 23:01:32 +01:00