8ff443cebf
If we accidentally unmask IRQs before we've registered a root IRQ handler, handle_arch_irq will be NULL, and the IRQ exception handler will branch to a bogus address. To make this easier to debug, this patch initialises handle_arch_irq to a default handler which will panic(), making such problems easier to debug. When we add support for FIQ handlers, we can follow the same approach. When we add support for a root FIQ handler, it's possible to have root IRQ handler without an root FIQ handler, and in theory the inverse is also possible. To permit this, and to keep the IRQ/FIQ registration logic similar, this patch removes the panic in the absence of a root IRQ controller. Instead, set_handle_irq() logs when a handler is registered, which is sufficient for debug purposes. Signed-off-by: Mark Rutland <mark.rutland@arm.com> Tested-by: Hector Martin <marcan@marcan.st> Cc: James Morse <james.morse@arm.com> Cc: Marc Zyngier <maz@kernel.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Will Deacon <will@kernel.org> Acked-by: Will Deacon <will@kernel.org> Link: https://lore.kernel.org/r/20210315115629.57191-4-mark.rutland@arm.com Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
106 lines
2.5 KiB
C
106 lines
2.5 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Based on arch/arm/kernel/irq.c
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*
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* Copyright (C) 1992 Linus Torvalds
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* Modifications for ARM processor Copyright (C) 1995-2000 Russell King.
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* Support for Dynamic Tick Timer Copyright (C) 2004-2005 Nokia Corporation.
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* Dynamic Tick Timer written by Tony Lindgren <tony@atomide.com> and
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* Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com>.
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* Copyright (C) 2012 ARM Ltd.
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*/
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#include <linux/irq.h>
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#include <linux/memory.h>
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#include <linux/smp.h>
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#include <linux/hardirq.h>
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#include <linux/init.h>
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#include <linux/irqchip.h>
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#include <linux/kprobes.h>
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#include <linux/scs.h>
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#include <linux/seq_file.h>
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#include <linux/vmalloc.h>
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#include <asm/daifflags.h>
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#include <asm/vmap_stack.h>
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/* Only access this in an NMI enter/exit */
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DEFINE_PER_CPU(struct nmi_ctx, nmi_contexts);
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DEFINE_PER_CPU(unsigned long *, irq_stack_ptr);
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DECLARE_PER_CPU(unsigned long *, irq_shadow_call_stack_ptr);
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#ifdef CONFIG_SHADOW_CALL_STACK
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DEFINE_PER_CPU(unsigned long *, irq_shadow_call_stack_ptr);
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#endif
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static void init_irq_scs(void)
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{
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int cpu;
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if (!IS_ENABLED(CONFIG_SHADOW_CALL_STACK))
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return;
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for_each_possible_cpu(cpu)
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per_cpu(irq_shadow_call_stack_ptr, cpu) =
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scs_alloc(cpu_to_node(cpu));
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}
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#ifdef CONFIG_VMAP_STACK
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static void init_irq_stacks(void)
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{
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int cpu;
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unsigned long *p;
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for_each_possible_cpu(cpu) {
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p = arch_alloc_vmap_stack(IRQ_STACK_SIZE, cpu_to_node(cpu));
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per_cpu(irq_stack_ptr, cpu) = p;
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}
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}
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#else
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/* irq stack only needs to be 16 byte aligned - not IRQ_STACK_SIZE aligned. */
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DEFINE_PER_CPU_ALIGNED(unsigned long [IRQ_STACK_SIZE/sizeof(long)], irq_stack);
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static void init_irq_stacks(void)
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{
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int cpu;
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for_each_possible_cpu(cpu)
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per_cpu(irq_stack_ptr, cpu) = per_cpu(irq_stack, cpu);
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}
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#endif
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static void default_handle_irq(struct pt_regs *regs)
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{
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panic("IRQ taken without a root IRQ handler\n");
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}
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void (*handle_arch_irq)(struct pt_regs *) __ro_after_init = default_handle_irq;
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int __init set_handle_irq(void (*handle_irq)(struct pt_regs *))
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{
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if (handle_arch_irq != default_handle_irq)
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return -EBUSY;
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handle_arch_irq = handle_irq;
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pr_info("Root IRQ handler: %ps\n", handle_irq);
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return 0;
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}
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void __init init_IRQ(void)
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{
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init_irq_stacks();
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init_irq_scs();
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irqchip_init();
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if (system_uses_irq_prio_masking()) {
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/*
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* Now that we have a stack for our IRQ handler, set
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* the PMR/PSR pair to a consistent state.
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*/
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WARN_ON(read_sysreg(daif) & PSR_A_BIT);
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local_daif_restore(DAIF_PROCCTX_NOIRQ);
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}
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}
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