2dcebc7ddc
Intel ENQCMD requires a single PASID to be shared between multiple devices, as the PASID is stored in a single MSR register per-process and userspace can use only that one PASID. This means that the PASID allocation for any ENQCMD using device driver must always come from a shared global pool, regardless of what kind of domain the PASID will be used with. Split the code for the global PASID allocator into iommu_alloc/free_global_pasid() so that drivers can attach non-SVA domains to PASIDs as well. This patch moves global PASID allocation APIs from SVA to IOMMU APIs. Reserved PASIDs, currently only RID_PASID, are excluded from the global PASID allocation. It is expected that device drivers will use the allocated PASIDs to attach to appropriate IOMMU domains for use. Reviewed-by: Lu Baolu <baolu.lu@linux.intel.com> Reviewed-by: Kevin Tian <kevin.tian@intel.com> Reviewed-by: Jason Gunthorpe <jgg@nvidia.com> Signed-off-by: Jacob Pan <jacob.jun.pan@linux.intel.com> Link: https://lore.kernel.org/r/20230802212427.1497170-3-jacob.jun.pan@linux.intel.com Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
213 lines
4.9 KiB
C
213 lines
4.9 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Helpers for IOMMU drivers implementing SVA
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*/
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#include <linux/mmu_context.h>
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#include <linux/mutex.h>
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#include <linux/sched/mm.h>
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#include <linux/iommu.h>
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#include "iommu-sva.h"
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static DEFINE_MUTEX(iommu_sva_lock);
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/* Allocate a PASID for the mm within range (inclusive) */
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static int iommu_sva_alloc_pasid(struct mm_struct *mm, struct device *dev)
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{
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ioasid_t pasid;
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int ret = 0;
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if (!arch_pgtable_dma_compat(mm))
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return -EBUSY;
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mutex_lock(&iommu_sva_lock);
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/* Is a PASID already associated with this mm? */
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if (mm_valid_pasid(mm)) {
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if (mm->pasid >= dev->iommu->max_pasids)
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ret = -EOVERFLOW;
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goto out;
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}
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pasid = iommu_alloc_global_pasid(dev);
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if (pasid == IOMMU_PASID_INVALID) {
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ret = -ENOSPC;
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goto out;
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}
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mm->pasid = pasid;
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ret = 0;
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out:
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mutex_unlock(&iommu_sva_lock);
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return ret;
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}
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/**
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* iommu_sva_bind_device() - Bind a process address space to a device
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* @dev: the device
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* @mm: the mm to bind, caller must hold a reference to mm_users
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*
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* Create a bond between device and address space, allowing the device to
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* access the mm using the PASID returned by iommu_sva_get_pasid(). If a
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* bond already exists between @device and @mm, an additional internal
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* reference is taken. Caller must call iommu_sva_unbind_device()
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* to release each reference.
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*
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* iommu_dev_enable_feature(dev, IOMMU_DEV_FEAT_SVA) must be called first, to
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* initialize the required SVA features.
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*
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* On error, returns an ERR_PTR value.
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*/
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struct iommu_sva *iommu_sva_bind_device(struct device *dev, struct mm_struct *mm)
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{
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struct iommu_domain *domain;
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struct iommu_sva *handle;
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int ret;
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/* Allocate mm->pasid if necessary. */
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ret = iommu_sva_alloc_pasid(mm, dev);
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if (ret)
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return ERR_PTR(ret);
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handle = kzalloc(sizeof(*handle), GFP_KERNEL);
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if (!handle)
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return ERR_PTR(-ENOMEM);
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mutex_lock(&iommu_sva_lock);
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/* Search for an existing domain. */
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domain = iommu_get_domain_for_dev_pasid(dev, mm->pasid,
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IOMMU_DOMAIN_SVA);
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if (IS_ERR(domain)) {
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ret = PTR_ERR(domain);
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goto out_unlock;
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}
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if (domain) {
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domain->users++;
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goto out;
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}
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/* Allocate a new domain and set it on device pasid. */
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domain = iommu_sva_domain_alloc(dev, mm);
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if (!domain) {
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ret = -ENOMEM;
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goto out_unlock;
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}
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ret = iommu_attach_device_pasid(domain, dev, mm->pasid);
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if (ret)
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goto out_free_domain;
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domain->users = 1;
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out:
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mutex_unlock(&iommu_sva_lock);
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handle->dev = dev;
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handle->domain = domain;
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return handle;
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out_free_domain:
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iommu_domain_free(domain);
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out_unlock:
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mutex_unlock(&iommu_sva_lock);
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kfree(handle);
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return ERR_PTR(ret);
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}
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EXPORT_SYMBOL_GPL(iommu_sva_bind_device);
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/**
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* iommu_sva_unbind_device() - Remove a bond created with iommu_sva_bind_device
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* @handle: the handle returned by iommu_sva_bind_device()
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*
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* Put reference to a bond between device and address space. The device should
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* not be issuing any more transaction for this PASID. All outstanding page
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* requests for this PASID must have been flushed to the IOMMU.
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*/
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void iommu_sva_unbind_device(struct iommu_sva *handle)
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{
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struct iommu_domain *domain = handle->domain;
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ioasid_t pasid = domain->mm->pasid;
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struct device *dev = handle->dev;
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mutex_lock(&iommu_sva_lock);
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if (--domain->users == 0) {
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iommu_detach_device_pasid(domain, dev, pasid);
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iommu_domain_free(domain);
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}
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mutex_unlock(&iommu_sva_lock);
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kfree(handle);
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}
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EXPORT_SYMBOL_GPL(iommu_sva_unbind_device);
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u32 iommu_sva_get_pasid(struct iommu_sva *handle)
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{
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struct iommu_domain *domain = handle->domain;
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return domain->mm->pasid;
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}
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EXPORT_SYMBOL_GPL(iommu_sva_get_pasid);
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/*
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* I/O page fault handler for SVA
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*/
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enum iommu_page_response_code
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iommu_sva_handle_iopf(struct iommu_fault *fault, void *data)
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{
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vm_fault_t ret;
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struct vm_area_struct *vma;
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struct mm_struct *mm = data;
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unsigned int access_flags = 0;
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unsigned int fault_flags = FAULT_FLAG_REMOTE;
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struct iommu_fault_page_request *prm = &fault->prm;
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enum iommu_page_response_code status = IOMMU_PAGE_RESP_INVALID;
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if (!(prm->flags & IOMMU_FAULT_PAGE_REQUEST_PASID_VALID))
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return status;
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if (!mmget_not_zero(mm))
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return status;
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mmap_read_lock(mm);
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vma = vma_lookup(mm, prm->addr);
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if (!vma)
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/* Unmapped area */
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goto out_put_mm;
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if (prm->perm & IOMMU_FAULT_PERM_READ)
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access_flags |= VM_READ;
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if (prm->perm & IOMMU_FAULT_PERM_WRITE) {
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access_flags |= VM_WRITE;
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fault_flags |= FAULT_FLAG_WRITE;
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}
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if (prm->perm & IOMMU_FAULT_PERM_EXEC) {
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access_flags |= VM_EXEC;
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fault_flags |= FAULT_FLAG_INSTRUCTION;
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}
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if (!(prm->perm & IOMMU_FAULT_PERM_PRIV))
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fault_flags |= FAULT_FLAG_USER;
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if (access_flags & ~vma->vm_flags)
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/* Access fault */
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goto out_put_mm;
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ret = handle_mm_fault(vma, prm->addr, fault_flags, NULL);
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status = ret & VM_FAULT_ERROR ? IOMMU_PAGE_RESP_INVALID :
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IOMMU_PAGE_RESP_SUCCESS;
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out_put_mm:
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mmap_read_unlock(mm);
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mmput(mm);
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return status;
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}
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void mm_pasid_drop(struct mm_struct *mm)
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{
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if (likely(!mm_valid_pasid(mm)))
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return;
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iommu_free_global_pasid(mm->pasid);
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}
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