Will Deacon 411b7ca7f6 irqchip/gic-v3: Convert arm64 GIC accessors to {read,write}_sysreg_s
commit d44ffa5ae70a15a15190aa9ffa6f6acdeae1d25c upstream.

The GIC system registers are accessed using open-coded wrappers around
the mrs_s/msr_s asm macros.

This patch moves the code over to the {read,wrote}_sysreg_s accessors
instead, reducing the amount of explicit asm blocks in the arch headers.

Reviewed-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
[nc: Also fix gic_write_bpr1, which was incidentally fixed in
     0e9884fe63c6 ("arm64: sysreg: subsume GICv3 sysreg definitions")]
Signed-off-by: Nathan Chancellor <natechancellor@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-02-27 10:07:02 +01:00
..
2019-02-20 10:18:32 +01:00
2019-02-27 10:07:01 +01:00
2019-02-27 10:06:59 +01:00
2018-11-13 11:16:47 -08:00