6bfe9a23a8
[why] When we force ODM combine with DSC, we lose several 8 bit and 10 bit modes in validation and thus not able to use HDR. This is due to the number of horizontal slices used in DSC not properly being accounted for currently when 2:1 ODM Combine is forced. [how] Enforce at least two horizontal slices are used for DSC when ODM combine is forced. Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Nasir Osman <nasir.osman@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
112 lines
4.0 KiB
C
112 lines
4.0 KiB
C
#ifndef DC_DSC_H_
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#define DC_DSC_H_
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/*
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* Copyright 2019 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Author: AMD
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*/
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/* put it here temporarily until linux has the new addresses official defined */
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/* DP Extended DSC Capabilities */
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#define DP_DSC_BRANCH_OVERALL_THROUGHPUT_0 0x0a0 /* DP 1.4a SCR */
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#define DP_DSC_BRANCH_OVERALL_THROUGHPUT_1 0x0a1
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#define DP_DSC_BRANCH_MAX_LINE_WIDTH 0x0a2
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#include "dc_types.h"
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struct dc_dsc_bw_range {
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uint32_t min_kbps; /* Bandwidth if min_target_bpp_x16 is used */
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uint32_t min_target_bpp_x16;
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uint32_t max_kbps; /* Bandwidth if max_target_bpp_x16 is used */
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uint32_t max_target_bpp_x16;
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uint32_t stream_kbps; /* Uncompressed stream bandwidth */
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};
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struct display_stream_compressor {
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const struct dsc_funcs *funcs;
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struct dc_context *ctx;
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int inst;
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};
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struct dc_dsc_policy {
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bool use_min_slices_h;
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int max_slices_h; // Maximum available if 0
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int min_slice_height; // Must not be less than 8
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uint32_t max_target_bpp;
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uint32_t min_target_bpp;
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bool enable_dsc_when_not_needed;
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};
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struct dc_dsc_config_options {
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uint32_t dsc_min_slice_height_override;
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uint32_t max_target_bpp_limit_override_x16;
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uint32_t slice_height_granularity;
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uint32_t dsc_force_odm_hslice_override;
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};
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bool dc_dsc_parse_dsc_dpcd(const struct dc *dc,
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const uint8_t *dpcd_dsc_basic_data,
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const uint8_t *dpcd_dsc_ext_data,
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struct dsc_dec_dpcd_caps *dsc_sink_caps);
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bool dc_dsc_compute_bandwidth_range(
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const struct display_stream_compressor *dsc,
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uint32_t dsc_min_slice_height_override,
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uint32_t min_bpp_x16,
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uint32_t max_bpp_x16,
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const struct dsc_dec_dpcd_caps *dsc_sink_caps,
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const struct dc_crtc_timing *timing,
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struct dc_dsc_bw_range *range);
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bool dc_dsc_compute_config(
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const struct display_stream_compressor *dsc,
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const struct dsc_dec_dpcd_caps *dsc_sink_caps,
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const struct dc_dsc_config_options *options,
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uint32_t target_bandwidth_kbps,
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const struct dc_crtc_timing *timing,
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struct dc_dsc_config *dsc_cfg);
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uint32_t dc_dsc_stream_bandwidth_in_kbps(const struct dc_crtc_timing *timing,
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uint32_t bpp_x16, uint32_t num_slices_h, bool is_dp);
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uint32_t dc_dsc_stream_bandwidth_overhead_in_kbps(
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const struct dc_crtc_timing *timing,
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const int num_slices_h,
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const bool is_dp);
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/* TODO - Hardware/specs limitation should be owned by dc dsc and returned to DM,
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* and DM can choose to OVERRIDE the limitation on CASE BY CASE basis.
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* Hardware/specs limitation should not be writable by DM.
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* It should be decoupled from DM specific policy and named differently.
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*/
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void dc_dsc_get_policy_for_timing(const struct dc_crtc_timing *timing,
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uint32_t max_target_bpp_limit_override_x16,
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struct dc_dsc_policy *policy);
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void dc_dsc_policy_set_max_target_bpp_limit(uint32_t limit);
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void dc_dsc_policy_set_enable_dsc_when_not_needed(bool enable);
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void dc_dsc_policy_set_disable_dsc_stream_overhead(bool disable);
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void dc_dsc_get_default_config_option(const struct dc *dc, struct dc_dsc_config_options *options);
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#endif
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