08872cb13a
The full authentication via the GSC requires an heci packet submission
to the GSC FW via the GSC CS. The GSC has new PXP command for this
(literally called NEW_HUC_AUTH).
The intel_huc_auth function is also updated to handle both authentication
types.
v2: check that the GuC auth for clear media has completed before
proceding with the full auth
v3: use a define for the object size (Alan)
Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Alan Previn <alan.previn.teres.alexis@intel.com>
Reviewed-by: Alan Previn <alan.previn.teres.alexis@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230531235415.1467475-6-daniele.ceraolospurio@intel.com
295 lines
9.2 KiB
C
295 lines
9.2 KiB
C
// SPDX-License-Identifier: MIT
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/*
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* Copyright © 2014-2019 Intel Corporation
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*/
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#include "gt/intel_gsc.h"
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#include "gt/intel_gt.h"
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#include "intel_gsc_binary_headers.h"
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#include "intel_gsc_uc_heci_cmd_submit.h"
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#include "intel_huc.h"
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#include "intel_huc_fw.h"
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#include "intel_huc_print.h"
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#include "i915_drv.h"
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#include "pxp/intel_pxp_huc.h"
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#include "pxp/intel_pxp_cmd_interface_43.h"
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struct mtl_huc_auth_msg_in {
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struct intel_gsc_mtl_header header;
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struct pxp43_new_huc_auth_in huc_in;
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} __packed;
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struct mtl_huc_auth_msg_out {
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struct intel_gsc_mtl_header header;
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struct pxp43_huc_auth_out huc_out;
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} __packed;
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int intel_huc_fw_auth_via_gsccs(struct intel_huc *huc)
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{
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struct intel_gt *gt = huc_to_gt(huc);
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struct drm_i915_private *i915 = gt->i915;
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struct drm_i915_gem_object *obj;
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struct mtl_huc_auth_msg_in *msg_in;
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struct mtl_huc_auth_msg_out *msg_out;
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void *pkt_vaddr;
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u64 pkt_offset;
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int retry = 5;
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int err = 0;
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if (!huc->heci_pkt)
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return -ENODEV;
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obj = huc->heci_pkt->obj;
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pkt_offset = i915_ggtt_offset(huc->heci_pkt);
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pkt_vaddr = i915_gem_object_pin_map_unlocked(obj,
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i915_coherent_map_type(i915, obj, true));
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if (IS_ERR(pkt_vaddr))
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return PTR_ERR(pkt_vaddr);
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msg_in = pkt_vaddr;
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msg_out = pkt_vaddr + PXP43_HUC_AUTH_INOUT_SIZE;
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intel_gsc_uc_heci_cmd_emit_mtl_header(&msg_in->header,
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HECI_MEADDRESS_PXP,
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sizeof(*msg_in), 0);
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msg_in->huc_in.header.api_version = PXP_APIVER(4, 3);
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msg_in->huc_in.header.command_id = PXP43_CMDID_NEW_HUC_AUTH;
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msg_in->huc_in.header.status = 0;
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msg_in->huc_in.header.buffer_len = sizeof(msg_in->huc_in) -
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sizeof(msg_in->huc_in.header);
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msg_in->huc_in.huc_base_address = huc->fw.vma_res.start;
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msg_in->huc_in.huc_size = huc->fw.obj->base.size;
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do {
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err = intel_gsc_uc_heci_cmd_submit_packet(>->uc.gsc,
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pkt_offset, sizeof(*msg_in),
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pkt_offset + PXP43_HUC_AUTH_INOUT_SIZE,
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PXP43_HUC_AUTH_INOUT_SIZE);
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if (err) {
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huc_err(huc, "failed to submit GSC request to auth: %d\n", err);
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goto out_unpin;
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}
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if (msg_out->header.flags & GSC_OUTFLAG_MSG_PENDING) {
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msg_in->header.gsc_message_handle = msg_out->header.gsc_message_handle;
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err = -EBUSY;
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msleep(50);
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}
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} while (--retry && err == -EBUSY);
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if (err)
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goto out_unpin;
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if (msg_out->header.message_size != sizeof(*msg_out)) {
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huc_err(huc, "invalid GSC reply length %u [expected %zu]\n",
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msg_out->header.message_size, sizeof(*msg_out));
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err = -EPROTO;
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goto out_unpin;
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}
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/*
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* The GSC will return PXP_STATUS_OP_NOT_PERMITTED if the HuC is already
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* loaded. If the same error is ever returned with HuC not loaded we'll
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* still catch it when we check the authentication bit later.
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*/
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if (msg_out->huc_out.header.status != PXP_STATUS_SUCCESS &&
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msg_out->huc_out.header.status != PXP_STATUS_OP_NOT_PERMITTED) {
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huc_err(huc, "auth failed with GSC error = 0x%x\n",
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msg_out->huc_out.header.status);
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err = -EIO;
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goto out_unpin;
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}
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out_unpin:
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i915_gem_object_unpin_map(obj);
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return err;
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}
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static void get_version_from_gsc_manifest(struct intel_uc_fw_ver *ver, const void *data)
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{
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const struct intel_gsc_manifest_header *manifest = data;
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ver->major = manifest->fw_version.major;
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ver->minor = manifest->fw_version.minor;
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ver->patch = manifest->fw_version.hotfix;
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}
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static bool css_valid(const void *data, size_t size)
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{
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const struct uc_css_header *css = data;
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if (unlikely(size < sizeof(struct uc_css_header)))
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return false;
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if (css->module_type != 0x6)
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return false;
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if (css->module_vendor != PCI_VENDOR_ID_INTEL)
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return false;
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return true;
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}
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static inline u32 entry_offset(const struct intel_gsc_cpd_entry *entry)
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{
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return entry->offset & INTEL_GSC_CPD_ENTRY_OFFSET_MASK;
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}
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int intel_huc_fw_get_binary_info(struct intel_uc_fw *huc_fw, const void *data, size_t size)
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{
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struct intel_huc *huc = container_of(huc_fw, struct intel_huc, fw);
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const struct intel_gsc_cpd_header_v2 *header = data;
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const struct intel_gsc_cpd_entry *entry;
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size_t min_size = sizeof(*header);
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int i;
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if (!huc_fw->has_gsc_headers) {
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huc_err(huc, "Invalid FW type for GSC header parsing!\n");
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return -EINVAL;
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}
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if (size < sizeof(*header)) {
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huc_err(huc, "FW too small! %zu < %zu\n", size, min_size);
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return -ENODATA;
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}
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/*
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* The GSC-enabled HuC binary starts with a directory header, followed
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* by a series of entries. Each entry is identified by a name and
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* points to a specific section of the binary containing the relevant
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* data. The entries we're interested in are:
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* - "HUCP.man": points to the GSC manifest header for the HuC, which
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* contains the version info.
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* - "huc_fw": points to the legacy-style binary that can be used for
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* load via the DMA. This entry only contains a valid CSS
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* on binaries for platforms that support 2-step HuC load
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* via dma and auth via GSC (like MTL).
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*
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* --------------------------------------------------
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* [ intel_gsc_cpd_header_v2 ]
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* --------------------------------------------------
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* [ intel_gsc_cpd_entry[] ]
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* [ entry1 ]
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* [ ... ]
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* [ entryX ]
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* [ "HUCP.man" ]
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* [ ... ]
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* [ offset >----------------------------]------o
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* [ ... ] |
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* [ entryY ] |
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* [ "huc_fw" ] |
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* [ ... ] |
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* [ offset >----------------------------]----------o
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* -------------------------------------------------- | |
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* | |
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* -------------------------------------------------- | |
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* [ intel_gsc_manifest_header ]<-----o |
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* [ ... ] |
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* [ intel_gsc_version fw_version ] |
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* [ ... ] |
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* -------------------------------------------------- |
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* |
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* -------------------------------------------------- |
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* [ data[] ]<---------o
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* [ ... ]
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* [ ... ]
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* --------------------------------------------------
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*/
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if (header->header_marker != INTEL_GSC_CPD_HEADER_MARKER) {
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huc_err(huc, "invalid marker for CPD header: 0x%08x!\n",
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header->header_marker);
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return -EINVAL;
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}
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/* we only have binaries with header v2 and entry v1 for now */
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if (header->header_version != 2 || header->entry_version != 1) {
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huc_err(huc, "invalid CPD header/entry version %u:%u!\n",
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header->header_version, header->entry_version);
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return -EINVAL;
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}
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if (header->header_length < sizeof(struct intel_gsc_cpd_header_v2)) {
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huc_err(huc, "invalid CPD header length %u!\n",
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header->header_length);
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return -EINVAL;
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}
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min_size = header->header_length + sizeof(*entry) * header->num_of_entries;
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if (size < min_size) {
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huc_err(huc, "FW too small! %zu < %zu\n", size, min_size);
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return -ENODATA;
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}
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entry = data + header->header_length;
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for (i = 0; i < header->num_of_entries; i++, entry++) {
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if (strcmp(entry->name, "HUCP.man") == 0)
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get_version_from_gsc_manifest(&huc_fw->file_selected.ver,
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data + entry_offset(entry));
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if (strcmp(entry->name, "huc_fw") == 0) {
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u32 offset = entry_offset(entry);
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if (offset < size && css_valid(data + offset, size - offset))
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huc_fw->dma_start_offset = offset;
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}
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}
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return 0;
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}
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int intel_huc_fw_load_and_auth_via_gsc(struct intel_huc *huc)
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{
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int ret;
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if (!intel_huc_is_loaded_by_gsc(huc))
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return -ENODEV;
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if (!intel_uc_fw_is_loadable(&huc->fw))
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return -ENOEXEC;
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/*
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* If we abort a suspend, HuC might still be loaded when the mei
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* component gets re-bound and this function called again. If so, just
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* mark the HuC as loaded.
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*/
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if (intel_huc_is_authenticated(huc, INTEL_HUC_AUTH_BY_GSC)) {
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intel_uc_fw_change_status(&huc->fw, INTEL_UC_FIRMWARE_RUNNING);
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return 0;
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}
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GEM_WARN_ON(intel_uc_fw_is_loaded(&huc->fw));
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ret = intel_pxp_huc_load_and_auth(huc_to_gt(huc)->i915->pxp);
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if (ret)
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return ret;
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intel_uc_fw_change_status(&huc->fw, INTEL_UC_FIRMWARE_TRANSFERRED);
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return intel_huc_wait_for_auth_complete(huc, INTEL_HUC_AUTH_BY_GSC);
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}
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/**
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* intel_huc_fw_upload() - load HuC uCode to device via DMA transfer
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* @huc: intel_huc structure
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*
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* Called from intel_uc_init_hw() during driver load, resume from sleep and
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* after a GPU reset. Note that HuC must be loaded before GuC.
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*
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* The firmware image should have already been fetched into memory, so only
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* check that fetch succeeded, and then transfer the image to the h/w.
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*
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* Return: non-zero code on error
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*/
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int intel_huc_fw_upload(struct intel_huc *huc)
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{
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if (intel_huc_is_loaded_by_gsc(huc))
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return -ENODEV;
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/* HW doesn't look at destination address for HuC, so set it to 0 */
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return intel_uc_fw_upload(&huc->fw, 0, HUC_UKERNEL);
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}
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