7636c9a6e7
Currently in the case of WCN6750, only one TCL ring is used for TX, this is limiting the TX throughput in 160 MHz case, enabling multiple TCL rings on WCN6750 has shown an improvement of nearly 300 Mbps in the case of TCP TX, therefore add the support of multi TX ring for WCN6750. Currently TCL ring is selected based on CPU ID, this logic cannot be applied for WCN6750 as there is chance of out of order TX of packets and to avoid this, choose TCL ring based on flow hash so that packets of the same flow will end up on same TCL ring. For the same reason, TCL ring retry logic is also not applicable for WCN6750. Also the mapping of TCL, WBM & RBM IDs for WCN6750 is different from existing devices. Create a new TCM/WBM/RBM mapping for WCN6750. Change does not impact existing ath11k devices. Tested-on: WCN6750 hw1.0 AHB WLAN.MSL.1.0.1-00887-QCAMSLSWPLZ-1 Signed-off-by: Manikanta Pubbisetty <quic_mpubbise@quicinc.com> Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com> Link: https://lore.kernel.org/r/20220905071805.31625-3-quic_mpubbise@quicinc.com
75 lines
2.1 KiB
C
75 lines
2.1 KiB
C
/* SPDX-License-Identifier: BSD-3-Clause-Clear */
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/*
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* Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
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* Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
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*/
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#ifndef ATH11K_HAL_TX_H
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#define ATH11K_HAL_TX_H
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#include "hal_desc.h"
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#include "core.h"
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#define HAL_TX_ADDRX_EN 1
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#define HAL_TX_ADDRY_EN 2
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#define HAL_TX_ADDR_SEARCH_DEFAULT 0
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#define HAL_TX_ADDR_SEARCH_INDEX 1
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struct hal_tx_info {
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u16 meta_data_flags; /* %HAL_TCL_DATA_CMD_INFO0_META_ */
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u8 ring_id;
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u32 desc_id;
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enum hal_tcl_desc_type type;
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enum hal_tcl_encap_type encap_type;
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dma_addr_t paddr;
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u32 data_len;
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u32 pkt_offset;
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enum hal_encrypt_type encrypt_type;
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u32 flags0; /* %HAL_TCL_DATA_CMD_INFO1_ */
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u32 flags1; /* %HAL_TCL_DATA_CMD_INFO2_ */
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u16 addr_search_flags; /* %HAL_TCL_DATA_CMD_INFO0_ADDR(X/Y)_ */
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u16 bss_ast_hash;
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u16 bss_ast_idx;
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u8 tid;
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u8 search_type; /* %HAL_TX_ADDR_SEARCH_ */
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u8 lmac_id;
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u8 dscp_tid_tbl_idx;
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bool enable_mesh;
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u8 rbm_id;
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};
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/* TODO: Check if the actual desc macros can be used instead */
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#define HAL_TX_STATUS_FLAGS_FIRST_MSDU BIT(0)
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#define HAL_TX_STATUS_FLAGS_LAST_MSDU BIT(1)
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#define HAL_TX_STATUS_FLAGS_MSDU_IN_AMSDU BIT(2)
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#define HAL_TX_STATUS_FLAGS_RATE_STATS_VALID BIT(3)
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#define HAL_TX_STATUS_FLAGS_RATE_LDPC BIT(4)
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#define HAL_TX_STATUS_FLAGS_RATE_STBC BIT(5)
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#define HAL_TX_STATUS_FLAGS_OFDMA BIT(6)
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#define HAL_TX_STATUS_DESC_LEN sizeof(struct hal_wbm_release_ring)
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/* Tx status parsed from srng desc */
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struct hal_tx_status {
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enum hal_wbm_rel_src_module buf_rel_source;
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enum hal_wbm_tqm_rel_reason status;
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u8 ack_rssi;
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u32 flags; /* %HAL_TX_STATUS_FLAGS_ */
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u32 ppdu_id;
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u8 try_cnt;
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u8 tid;
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u16 peer_id;
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u32 rate_stats;
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};
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void ath11k_hal_tx_cmd_desc_setup(struct ath11k_base *ab, void *cmd,
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struct hal_tx_info *ti);
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void ath11k_hal_tx_set_dscp_tid_map(struct ath11k_base *ab, int id);
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int ath11k_hal_reo_cmd_send(struct ath11k_base *ab, struct hal_srng *srng,
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enum hal_reo_cmd_type type,
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struct ath11k_hal_reo_cmd *cmd);
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void ath11k_hal_tx_init_data_ring(struct ath11k_base *ab,
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struct hal_srng *srng);
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#endif
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