69ccee619a
Add support for WoW on WCN6750 chipset. Unlike other chips where WoW exit happens after sending WoW wakeup WMI command, exit from WoW suspend in the case of WCN6750 happens upon sending a WoW exit SMP2P (Shared memory point to point) message to the firmware. Tested-on: WCN6750 hw1.0 AHB WLAN.MSL.1.0.1-00887-QCAMSLSWPLZ-1 Signed-off-by: Manikanta Pubbisetty <quic_mpubbise@quicinc.com> Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com> Link: https://lore.kernel.org/r/20220902112520.24804-3-quic_mpubbise@quicinc.com
55 lines
2.1 KiB
C
55 lines
2.1 KiB
C
/* SPDX-License-Identifier: BSD-3-Clause-Clear */
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/*
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* Copyright (c) 2019-2021 The Linux Foundation. All rights reserved.
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* Copyright (c) 2021-2022, Qualcomm Innovation Center, Inc. All rights reserved.
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*/
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#ifndef _ATH11K_PCI_CMN_H
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#define _ATH11K_PCI_CMN_H
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#include "core.h"
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#define ATH11K_PCI_IRQ_CE0_OFFSET 3
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#define ATH11K_PCI_IRQ_DP_OFFSET 14
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#define ATH11K_PCI_CE_WAKE_IRQ 2
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#define ATH11K_PCI_WINDOW_ENABLE_BIT 0x40000000
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#define ATH11K_PCI_WINDOW_REG_ADDRESS 0x310c
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#define ATH11K_PCI_WINDOW_VALUE_MASK GENMASK(24, 19)
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#define ATH11K_PCI_WINDOW_START 0x80000
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#define ATH11K_PCI_WINDOW_RANGE_MASK GENMASK(18, 0)
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/* BAR0 + 4k is always accessible, and no
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* need to force wakeup.
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* 4K - 32 = 0xFE0
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*/
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#define ATH11K_PCI_ACCESS_ALWAYS_OFF 0xFE0
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int ath11k_pcic_get_user_msi_assignment(struct ath11k_base *ab, char *user_name,
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int *num_vectors, u32 *user_base_data,
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u32 *base_vector);
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void ath11k_pcic_write32(struct ath11k_base *ab, u32 offset, u32 value);
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u32 ath11k_pcic_read32(struct ath11k_base *ab, u32 offset);
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void ath11k_pcic_get_msi_address(struct ath11k_base *ab, u32 *msi_addr_lo,
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u32 *msi_addr_hi);
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void ath11k_pcic_get_ce_msi_idx(struct ath11k_base *ab, u32 ce_id, u32 *msi_idx);
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void ath11k_pcic_free_irq(struct ath11k_base *ab);
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int ath11k_pcic_config_irq(struct ath11k_base *ab);
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void ath11k_pcic_ext_irq_enable(struct ath11k_base *ab);
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void ath11k_pcic_ext_irq_disable(struct ath11k_base *ab);
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void ath11k_pcic_stop(struct ath11k_base *ab);
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int ath11k_pcic_start(struct ath11k_base *ab);
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int ath11k_pcic_map_service_to_pipe(struct ath11k_base *ab, u16 service_id,
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u8 *ul_pipe, u8 *dl_pipe);
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void ath11k_pcic_ce_irqs_enable(struct ath11k_base *ab);
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void ath11k_pcic_ce_irq_disable_sync(struct ath11k_base *ab);
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int ath11k_pcic_init_msi_config(struct ath11k_base *ab);
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int ath11k_pcic_register_pci_ops(struct ath11k_base *ab,
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const struct ath11k_pci_ops *pci_ops);
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int ath11k_pcic_read(struct ath11k_base *ab, void *buf, u32 start, u32 end);
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void ath11k_pci_enable_ce_irqs_except_wake_irq(struct ath11k_base *ab);
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void ath11k_pci_disable_ce_irqs_except_wake_irq(struct ath11k_base *ab);
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#endif
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