336ba968d3
On Meteor Lake, the GNA, IPU, and VPU devices are booted in D0 power state and will block the SoC from going into the deepest Package C-state if a driver is not present. Put each device in D3hot if no driver is found. Signed-off-by: David E. Box <david.e.box@linux.intel.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Link: https://lore.kernel.org/r/20230409192535.914540-1-david.e.box@linux.intel.com Signed-off-by: Hans de Goede <hdegoede@redhat.com>
84 lines
2.4 KiB
C
84 lines
2.4 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* This file contains platform specific structure definitions
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* and init function used by Meteor Lake PCH.
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*
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* Copyright (c) 2022, Intel Corporation.
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* All Rights Reserved.
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*
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*/
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#include <linux/pci.h>
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#include "core.h"
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const struct pmc_reg_map mtl_reg_map = {
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.pfear_sts = ext_tgl_pfear_map,
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.slp_s0_offset = CNP_PMC_SLP_S0_RES_COUNTER_OFFSET,
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.slp_s0_res_counter_step = TGL_PMC_SLP_S0_RES_COUNTER_STEP,
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.ltr_show_sts = adl_ltr_show_map,
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.msr_sts = msr_map,
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.ltr_ignore_offset = CNP_PMC_LTR_IGNORE_OFFSET,
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.regmap_length = CNP_PMC_MMIO_REG_LEN,
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.ppfear0_offset = CNP_PMC_HOST_PPFEAR0A,
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.ppfear_buckets = ICL_PPFEAR_NUM_ENTRIES,
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.pm_cfg_offset = CNP_PMC_PM_CFG_OFFSET,
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.pm_read_disable_bit = CNP_PMC_READ_DISABLE_BIT,
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.ltr_ignore_max = ADL_NUM_IP_IGN_ALLOWED,
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.lpm_num_modes = ADL_LPM_NUM_MODES,
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.lpm_num_maps = ADL_LPM_NUM_MAPS,
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.lpm_res_counter_step_x2 = TGL_PMC_LPM_RES_COUNTER_STEP_X2,
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.etr3_offset = ETR3_OFFSET,
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.lpm_sts_latch_en_offset = MTL_LPM_STATUS_LATCH_EN_OFFSET,
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.lpm_priority_offset = MTL_LPM_PRI_OFFSET,
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.lpm_en_offset = MTL_LPM_EN_OFFSET,
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.lpm_residency_offset = MTL_LPM_RESIDENCY_OFFSET,
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.lpm_sts = adl_lpm_maps,
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.lpm_status_offset = MTL_LPM_STATUS_OFFSET,
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.lpm_live_status_offset = MTL_LPM_LIVE_STATUS_OFFSET,
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};
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void mtl_core_configure(struct pmc_dev *pmcdev)
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{
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/* Due to a hardware limitation, the GBE LTR blocks PC10
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* when a cable is attached. Tell the PMC to ignore it.
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*/
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dev_dbg(&pmcdev->pdev->dev, "ignoring GBE LTR\n");
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pmc_core_send_ltr_ignore(pmcdev, 3);
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}
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#define MTL_GNA_PCI_DEV 0x7e4c
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#define MTL_IPU_PCI_DEV 0x7d19
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#define MTL_VPU_PCI_DEV 0x7d1d
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static void mtl_set_device_d3(unsigned int device)
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{
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struct pci_dev *pcidev;
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pcidev = pci_get_device(PCI_VENDOR_ID_INTEL, device, NULL);
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if (pcidev) {
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if (!device_trylock(&pcidev->dev)) {
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pci_dev_put(pcidev);
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return;
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}
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if (!pcidev->dev.driver) {
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dev_info(&pcidev->dev, "Setting to D3hot\n");
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pci_set_power_state(pcidev, PCI_D3hot);
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}
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device_unlock(&pcidev->dev);
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pci_dev_put(pcidev);
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}
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}
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void mtl_core_init(struct pmc_dev *pmcdev)
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{
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pmcdev->map = &mtl_reg_map;
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pmcdev->core_configure = mtl_core_configure;
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/*
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* Set power state of select devices that do not have drivers to D3
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* so that they do not block Package C entry.
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*/
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mtl_set_device_d3(MTL_GNA_PCI_DEV);
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mtl_set_device_d3(MTL_IPU_PCI_DEV);
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mtl_set_device_d3(MTL_VPU_PCI_DEV);
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}
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