Basic HW functions implemented for adjusting frequency, adjusting time, getting and setting time. With these callbacks we now do register ptp clock in the system. Firmware interface parts are defined for PTP requests and interactions. Enable/disable PTP counters in HW on clock register/unregister. Signed-off-by: Egor Pomozov <epomozov@marvell.com> Co-developed-by: Sergey Samoilenko <sergey.samoilenko@aquantia.com> Signed-off-by: Sergey Samoilenko <sergey.samoilenko@aquantia.com> Co-developed-by: Dmitry Bezrukov <dmitry.bezrukov@aquantia.com> Signed-off-by: Dmitry Bezrukov <dmitry.bezrukov@aquantia.com> Signed-off-by: Igor Russkikh <igor.russkikh@aquantia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
210 lines
4.9 KiB
C
210 lines
4.9 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/* Aquantia Corporation Network Driver
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* Copyright (C) 2014-2019 Aquantia Corporation. All rights reserved
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*/
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/* File aq_ptp.c:
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* Definition of functions for Linux PTP support.
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*/
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#include <linux/ptp_clock_kernel.h>
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#include <linux/clocksource.h>
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#include "aq_nic.h"
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#include "aq_ptp.h"
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struct aq_ptp_s {
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struct aq_nic_s *aq_nic;
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spinlock_t ptp_lock;
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struct ptp_clock *ptp_clock;
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struct ptp_clock_info ptp_info;
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};
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/* aq_ptp_adjfine
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* @ptp: the ptp clock structure
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* @ppb: parts per billion adjustment from base
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*
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* adjust the frequency of the ptp cycle counter by the
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* indicated ppb from the base frequency.
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*/
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static int aq_ptp_adjfine(struct ptp_clock_info *ptp, long scaled_ppm)
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{
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struct aq_ptp_s *aq_ptp = container_of(ptp, struct aq_ptp_s, ptp_info);
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struct aq_nic_s *aq_nic = aq_ptp->aq_nic;
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mutex_lock(&aq_nic->fwreq_mutex);
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aq_nic->aq_hw_ops->hw_adj_clock_freq(aq_nic->aq_hw,
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scaled_ppm_to_ppb(scaled_ppm));
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mutex_unlock(&aq_nic->fwreq_mutex);
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return 0;
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}
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/* aq_ptp_adjtime
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* @ptp: the ptp clock structure
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* @delta: offset to adjust the cycle counter by
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*
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* adjust the timer by resetting the timecounter structure.
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*/
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static int aq_ptp_adjtime(struct ptp_clock_info *ptp, s64 delta)
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{
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struct aq_ptp_s *aq_ptp = container_of(ptp, struct aq_ptp_s, ptp_info);
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struct aq_nic_s *aq_nic = aq_ptp->aq_nic;
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unsigned long flags;
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spin_lock_irqsave(&aq_ptp->ptp_lock, flags);
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aq_nic->aq_hw_ops->hw_adj_sys_clock(aq_nic->aq_hw, delta);
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spin_unlock_irqrestore(&aq_ptp->ptp_lock, flags);
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return 0;
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}
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/* aq_ptp_gettime
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* @ptp: the ptp clock structure
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* @ts: timespec structure to hold the current time value
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*
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* read the timecounter and return the correct value on ns,
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* after converting it into a struct timespec.
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*/
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static int aq_ptp_gettime(struct ptp_clock_info *ptp, struct timespec64 *ts)
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{
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struct aq_ptp_s *aq_ptp = container_of(ptp, struct aq_ptp_s, ptp_info);
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struct aq_nic_s *aq_nic = aq_ptp->aq_nic;
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unsigned long flags;
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u64 ns;
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spin_lock_irqsave(&aq_ptp->ptp_lock, flags);
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aq_nic->aq_hw_ops->hw_get_ptp_ts(aq_nic->aq_hw, &ns);
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spin_unlock_irqrestore(&aq_ptp->ptp_lock, flags);
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*ts = ns_to_timespec64(ns);
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return 0;
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}
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/* aq_ptp_settime
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* @ptp: the ptp clock structure
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* @ts: the timespec containing the new time for the cycle counter
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*
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* reset the timecounter to use a new base value instead of the kernel
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* wall timer value.
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*/
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static int aq_ptp_settime(struct ptp_clock_info *ptp,
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const struct timespec64 *ts)
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{
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struct aq_ptp_s *aq_ptp = container_of(ptp, struct aq_ptp_s, ptp_info);
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struct aq_nic_s *aq_nic = aq_ptp->aq_nic;
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unsigned long flags;
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u64 ns = timespec64_to_ns(ts);
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u64 now;
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spin_lock_irqsave(&aq_ptp->ptp_lock, flags);
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aq_nic->aq_hw_ops->hw_get_ptp_ts(aq_nic->aq_hw, &now);
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aq_nic->aq_hw_ops->hw_adj_sys_clock(aq_nic->aq_hw, (s64)ns - (s64)now);
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spin_unlock_irqrestore(&aq_ptp->ptp_lock, flags);
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return 0;
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}
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static struct ptp_clock_info aq_ptp_clock = {
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.owner = THIS_MODULE,
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.name = "atlantic ptp",
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.max_adj = 999999999,
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.n_ext_ts = 0,
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.pps = 0,
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.adjfine = aq_ptp_adjfine,
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.adjtime = aq_ptp_adjtime,
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.gettime64 = aq_ptp_gettime,
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.settime64 = aq_ptp_settime,
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.n_per_out = 0,
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.n_pins = 0,
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.pin_config = NULL,
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};
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int aq_ptp_init(struct aq_nic_s *aq_nic, unsigned int idx_vec)
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{
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struct hw_atl_utils_mbox mbox;
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struct ptp_clock *clock;
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struct aq_ptp_s *aq_ptp;
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int err = 0;
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if (!aq_nic->aq_hw_ops->hw_get_ptp_ts) {
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aq_nic->aq_ptp = NULL;
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return 0;
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}
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if (!aq_nic->aq_fw_ops->enable_ptp) {
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aq_nic->aq_ptp = NULL;
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return 0;
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}
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hw_atl_utils_mpi_read_stats(aq_nic->aq_hw, &mbox);
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if (!(mbox.info.caps_ex & BIT(CAPS_EX_PHY_PTP_EN))) {
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aq_nic->aq_ptp = NULL;
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return 0;
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}
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aq_ptp = kzalloc(sizeof(*aq_ptp), GFP_KERNEL);
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if (!aq_ptp) {
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err = -ENOMEM;
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goto err_exit;
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}
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aq_ptp->aq_nic = aq_nic;
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spin_lock_init(&aq_ptp->ptp_lock);
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aq_ptp->ptp_info = aq_ptp_clock;
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clock = ptp_clock_register(&aq_ptp->ptp_info, &aq_nic->ndev->dev);
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if (!clock || IS_ERR(clock)) {
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netdev_err(aq_nic->ndev, "ptp_clock_register failed\n");
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err = PTR_ERR(clock);
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goto err_exit;
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}
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aq_ptp->ptp_clock = clock;
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aq_nic->aq_ptp = aq_ptp;
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/* enable ptp counter */
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aq_utils_obj_set(&aq_nic->aq_hw->flags, AQ_HW_PTP_AVAILABLE);
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mutex_lock(&aq_nic->fwreq_mutex);
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aq_nic->aq_fw_ops->enable_ptp(aq_nic->aq_hw, 1);
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aq_ptp_clock_init(aq_nic);
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mutex_unlock(&aq_nic->fwreq_mutex);
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return 0;
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err_exit:
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kfree(aq_ptp);
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aq_nic->aq_ptp = NULL;
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return err;
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}
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void aq_ptp_unregister(struct aq_nic_s *aq_nic)
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{
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struct aq_ptp_s *aq_ptp = aq_nic->aq_ptp;
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if (!aq_ptp)
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return;
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ptp_clock_unregister(aq_ptp->ptp_clock);
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}
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void aq_ptp_free(struct aq_nic_s *aq_nic)
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{
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struct aq_ptp_s *aq_ptp = aq_nic->aq_ptp;
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if (!aq_ptp)
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return;
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/* disable ptp */
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mutex_lock(&aq_nic->fwreq_mutex);
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aq_nic->aq_fw_ops->enable_ptp(aq_nic->aq_hw, 0);
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mutex_unlock(&aq_nic->fwreq_mutex);
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kfree(aq_ptp);
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aq_nic->aq_ptp = NULL;
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}
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