Andre Przywara 9117d0c975 soc: sunxi: sram: Add support for more than one EMAC clock ... The Allwinner H616 adds a second EMAC clock register at offset 0x34, for controlling the second EMAC in this chip. Allow to extend the regmap in this case, to cover more than the current 4 bytes exported. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/20210127172500.13356-9-andre.przywara@arm.com		2021-01-28 11:19:47 +01:00
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Kconfig	soc: sunxi: Deal with the MBUS DMA offsets in a central place	2020-11-18 09:01:30 +01:00
Makefile	soc: sunxi: Deal with the MBUS DMA offsets in a central place	2020-11-18 09:01:30 +01:00
sunxi_mbus.c	soc: sunxi: Fix compilation of sunxi_mbus	2020-11-24 11:58:33 +01:00
sunxi_sram.c	soc: sunxi: sram: Add support for more than one EMAC clock	2021-01-28 11:19:47 +01:00