f9c697c4bf
Abstract access to transport CSRs and move generation specific code into adf_gen2_hw_data.c in preparation for the introduction of the qat_4xxx driver. Signed-off-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com> Reviewed-by: Fiona Trahe <fiona.trahe@intel.com> Reviewed-by: Wojciech Ziemba <wojciech.ziemba@intel.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
293 lines
7.7 KiB
C
293 lines
7.7 KiB
C
// SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0-only)
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/* Copyright(c) 2014 - 2020 Intel Corporation */
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/types.h>
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#include <linux/pci.h>
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#include <linux/slab.h>
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#include <linux/errno.h>
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#include <linux/interrupt.h>
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#include <linux/workqueue.h>
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#include "adf_accel_devices.h"
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#include "adf_common_drv.h"
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#include "adf_cfg.h"
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#include "adf_cfg_strings.h"
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#include "adf_cfg_common.h"
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#include "adf_transport_access_macros.h"
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#include "adf_transport_internal.h"
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#include "adf_pf2vf_msg.h"
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#define ADF_VINTSOU_OFFSET 0x204
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#define ADF_VINTSOU_BUN BIT(0)
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#define ADF_VINTSOU_PF2VF BIT(1)
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static struct workqueue_struct *adf_vf_stop_wq;
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struct adf_vf_stop_data {
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struct adf_accel_dev *accel_dev;
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struct work_struct work;
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};
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static int adf_enable_msi(struct adf_accel_dev *accel_dev)
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{
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struct adf_accel_pci *pci_dev_info = &accel_dev->accel_pci_dev;
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int stat = pci_enable_msi(pci_dev_info->pci_dev);
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if (stat) {
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dev_err(&GET_DEV(accel_dev),
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"Failed to enable MSI interrupts\n");
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return stat;
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}
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accel_dev->vf.irq_name = kzalloc(ADF_MAX_MSIX_VECTOR_NAME, GFP_KERNEL);
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if (!accel_dev->vf.irq_name)
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return -ENOMEM;
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return stat;
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}
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static void adf_disable_msi(struct adf_accel_dev *accel_dev)
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{
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struct pci_dev *pdev = accel_to_pci_dev(accel_dev);
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kfree(accel_dev->vf.irq_name);
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pci_disable_msi(pdev);
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}
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static void adf_dev_stop_async(struct work_struct *work)
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{
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struct adf_vf_stop_data *stop_data =
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container_of(work, struct adf_vf_stop_data, work);
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struct adf_accel_dev *accel_dev = stop_data->accel_dev;
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adf_dev_stop(accel_dev);
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adf_dev_shutdown(accel_dev);
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/* Re-enable PF2VF interrupts */
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adf_enable_pf2vf_interrupts(accel_dev);
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kfree(stop_data);
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}
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static void adf_pf2vf_bh_handler(void *data)
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{
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struct adf_accel_dev *accel_dev = data;
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struct adf_hw_device_data *hw_data = accel_dev->hw_device;
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struct adf_bar *pmisc =
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&GET_BARS(accel_dev)[hw_data->get_misc_bar_id(hw_data)];
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void __iomem *pmisc_bar_addr = pmisc->virt_addr;
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u32 msg;
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/* Read the message from PF */
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msg = ADF_CSR_RD(pmisc_bar_addr, hw_data->get_pf2vf_offset(0));
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if (!(msg & ADF_PF2VF_MSGORIGIN_SYSTEM))
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/* Ignore legacy non-system (non-kernel) PF2VF messages */
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goto err;
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switch ((msg & ADF_PF2VF_MSGTYPE_MASK) >> ADF_PF2VF_MSGTYPE_SHIFT) {
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case ADF_PF2VF_MSGTYPE_RESTARTING: {
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struct adf_vf_stop_data *stop_data;
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dev_dbg(&GET_DEV(accel_dev),
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"Restarting msg received from PF 0x%x\n", msg);
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clear_bit(ADF_STATUS_PF_RUNNING, &accel_dev->status);
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stop_data = kzalloc(sizeof(*stop_data), GFP_ATOMIC);
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if (!stop_data) {
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dev_err(&GET_DEV(accel_dev),
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"Couldn't schedule stop for vf_%d\n",
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accel_dev->accel_id);
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return;
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}
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stop_data->accel_dev = accel_dev;
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INIT_WORK(&stop_data->work, adf_dev_stop_async);
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queue_work(adf_vf_stop_wq, &stop_data->work);
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/* To ack, clear the PF2VFINT bit */
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msg &= ~ADF_PF2VF_INT;
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ADF_CSR_WR(pmisc_bar_addr, hw_data->get_pf2vf_offset(0), msg);
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return;
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}
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case ADF_PF2VF_MSGTYPE_VERSION_RESP:
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dev_dbg(&GET_DEV(accel_dev),
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"Version resp received from PF 0x%x\n", msg);
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accel_dev->vf.pf_version =
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(msg & ADF_PF2VF_VERSION_RESP_VERS_MASK) >>
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ADF_PF2VF_VERSION_RESP_VERS_SHIFT;
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accel_dev->vf.compatible =
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(msg & ADF_PF2VF_VERSION_RESP_RESULT_MASK) >>
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ADF_PF2VF_VERSION_RESP_RESULT_SHIFT;
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complete(&accel_dev->vf.iov_msg_completion);
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break;
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default:
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goto err;
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}
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/* To ack, clear the PF2VFINT bit */
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msg &= ~ADF_PF2VF_INT;
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ADF_CSR_WR(pmisc_bar_addr, hw_data->get_pf2vf_offset(0), msg);
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/* Re-enable PF2VF interrupts */
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adf_enable_pf2vf_interrupts(accel_dev);
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return;
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err:
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dev_err(&GET_DEV(accel_dev),
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"Unknown message from PF (0x%x); leaving PF2VF ints disabled\n",
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msg);
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}
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static int adf_setup_pf2vf_bh(struct adf_accel_dev *accel_dev)
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{
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tasklet_init(&accel_dev->vf.pf2vf_bh_tasklet,
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(void *)adf_pf2vf_bh_handler, (unsigned long)accel_dev);
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mutex_init(&accel_dev->vf.vf2pf_lock);
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return 0;
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}
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static void adf_cleanup_pf2vf_bh(struct adf_accel_dev *accel_dev)
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{
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tasklet_disable(&accel_dev->vf.pf2vf_bh_tasklet);
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tasklet_kill(&accel_dev->vf.pf2vf_bh_tasklet);
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mutex_destroy(&accel_dev->vf.vf2pf_lock);
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}
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static irqreturn_t adf_isr(int irq, void *privdata)
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{
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struct adf_accel_dev *accel_dev = privdata;
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struct adf_hw_device_data *hw_data = accel_dev->hw_device;
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struct adf_hw_csr_ops *csr_ops = &hw_data->csr_ops;
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struct adf_bar *pmisc =
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&GET_BARS(accel_dev)[hw_data->get_misc_bar_id(hw_data)];
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void __iomem *pmisc_bar_addr = pmisc->virt_addr;
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u32 v_int;
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/* Read VF INT source CSR to determine the source of VF interrupt */
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v_int = ADF_CSR_RD(pmisc_bar_addr, ADF_VINTSOU_OFFSET);
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/* Check for PF2VF interrupt */
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if (v_int & ADF_VINTSOU_PF2VF) {
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/* Disable PF to VF interrupt */
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adf_disable_pf2vf_interrupts(accel_dev);
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/* Schedule tasklet to handle interrupt BH */
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tasklet_hi_schedule(&accel_dev->vf.pf2vf_bh_tasklet);
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return IRQ_HANDLED;
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}
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/* Check bundle interrupt */
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if (v_int & ADF_VINTSOU_BUN) {
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struct adf_etr_data *etr_data = accel_dev->transport;
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struct adf_etr_bank_data *bank = &etr_data->banks[0];
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/* Disable Flag and Coalesce Ring Interrupts */
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csr_ops->write_csr_int_flag_and_col(bank->csr_addr,
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bank->bank_number, 0);
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tasklet_hi_schedule(&bank->resp_handler);
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return IRQ_HANDLED;
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}
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return IRQ_NONE;
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}
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static int adf_request_msi_irq(struct adf_accel_dev *accel_dev)
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{
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struct pci_dev *pdev = accel_to_pci_dev(accel_dev);
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unsigned int cpu;
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int ret;
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snprintf(accel_dev->vf.irq_name, ADF_MAX_MSIX_VECTOR_NAME,
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"qat_%02x:%02d.%02d", pdev->bus->number, PCI_SLOT(pdev->devfn),
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PCI_FUNC(pdev->devfn));
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ret = request_irq(pdev->irq, adf_isr, 0, accel_dev->vf.irq_name,
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(void *)accel_dev);
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if (ret) {
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dev_err(&GET_DEV(accel_dev), "failed to enable irq for %s\n",
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accel_dev->vf.irq_name);
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return ret;
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}
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cpu = accel_dev->accel_id % num_online_cpus();
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irq_set_affinity_hint(pdev->irq, get_cpu_mask(cpu));
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return ret;
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}
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static int adf_setup_bh(struct adf_accel_dev *accel_dev)
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{
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struct adf_etr_data *priv_data = accel_dev->transport;
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tasklet_init(&priv_data->banks[0].resp_handler, adf_response_handler,
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(unsigned long)priv_data->banks);
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return 0;
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}
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static void adf_cleanup_bh(struct adf_accel_dev *accel_dev)
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{
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struct adf_etr_data *priv_data = accel_dev->transport;
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tasklet_disable(&priv_data->banks[0].resp_handler);
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tasklet_kill(&priv_data->banks[0].resp_handler);
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}
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/**
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* adf_vf_isr_resource_free() - Free IRQ for acceleration device
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* @accel_dev: Pointer to acceleration device.
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*
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* Function frees interrupts for acceleration device virtual function.
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*/
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void adf_vf_isr_resource_free(struct adf_accel_dev *accel_dev)
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{
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struct pci_dev *pdev = accel_to_pci_dev(accel_dev);
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irq_set_affinity_hint(pdev->irq, NULL);
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free_irq(pdev->irq, (void *)accel_dev);
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adf_cleanup_bh(accel_dev);
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adf_cleanup_pf2vf_bh(accel_dev);
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adf_disable_msi(accel_dev);
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}
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EXPORT_SYMBOL_GPL(adf_vf_isr_resource_free);
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/**
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* adf_vf_isr_resource_alloc() - Allocate IRQ for acceleration device
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* @accel_dev: Pointer to acceleration device.
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*
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* Function allocates interrupts for acceleration device virtual function.
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*
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* Return: 0 on success, error code otherwise.
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*/
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int adf_vf_isr_resource_alloc(struct adf_accel_dev *accel_dev)
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{
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if (adf_enable_msi(accel_dev))
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goto err_out;
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if (adf_setup_pf2vf_bh(accel_dev))
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goto err_out;
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if (adf_setup_bh(accel_dev))
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goto err_out;
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if (adf_request_msi_irq(accel_dev))
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goto err_out;
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return 0;
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err_out:
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adf_vf_isr_resource_free(accel_dev);
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return -EFAULT;
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}
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EXPORT_SYMBOL_GPL(adf_vf_isr_resource_alloc);
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int __init adf_init_vf_wq(void)
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{
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adf_vf_stop_wq = alloc_workqueue("adf_vf_stop_wq", WQ_MEM_RECLAIM, 0);
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return !adf_vf_stop_wq ? -EFAULT : 0;
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}
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void adf_exit_vf_wq(void)
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{
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if (adf_vf_stop_wq)
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destroy_workqueue(adf_vf_stop_wq);
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adf_vf_stop_wq = NULL;
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}
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